18231102. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
- 1 SEMICONDUCTOR PACKAGE
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
YEONGSEON Kim of SUWON-SI (KR)
SUNKYOUNG Seo of SUWON-SI (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18231102 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the patent application involves stacking two semiconductor chips, each with a substrate, insulating layer, and pad. The first pad on the lower chip has an inclined side surface and width that increases towards the substrate, while the second pad on the upper chip has a similar design.
- The semiconductor package includes two stacked semiconductor chips with unique pad designs:
* The first semiconductor chip has a first substrate, insulating layer, and exposed first pad with an inclined side surface and increasing width towards the substrate. * The second semiconductor chip has a second substrate, insulating layer, and exposed second pad with a similar inclined side surface and increasing width towards the substrate.
Potential Applications
The technology described in this patent application could be applied in:
- Advanced semiconductor packaging for improved performance and efficiency.
- High-density integrated circuits for various electronic devices.
Problems Solved
This technology addresses the following issues:
- Enhancing connectivity and signal transmission between stacked semiconductor chips.
- Improving thermal management and reliability in semiconductor packaging.
Benefits
The benefits of this technology include:
- Enhanced electrical performance and signal integrity.
- Increased miniaturization and integration capabilities in semiconductor devices.
Potential Commercial Applications
The potential commercial applications of this technology could be seen in:
- Consumer electronics such as smartphones, tablets, and laptops.
- Automotive electronics for advanced driver assistance systems and infotainment.
Possible Prior Art
One possible prior art for this technology could be the use of stacked semiconductor chips with traditional pad designs and configurations.
Unanswered Questions
How does this technology impact manufacturing costs?
The article does not provide information on the potential impact of this technology on manufacturing costs.
What are the environmental implications of this technology?
The article does not address the environmental implications of implementing this technology.
Original Abstract Submitted
A semiconductor package includes a first semiconductor chip stacked on a second semiconductor chip. The first semiconductor chip includes a first substrate, a first insulating layer on a lower surface of the first substrate, and a first pad exposed through the first insulating layer. The second semiconductor chip includes a second substrate, a second insulating layer on an upper surface of the second substrate contacting the first insulating layer, and a second pad exposed through the second insulating layer contacting the first pad. The first pad has an inclined side surface and a first width that increases toward the first substrate, and the second pad has an inclined side surface and a second width that increases toward the second substrate.
