18230768. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR PACKAGE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Nara Lee of Suwon-si (KR)

Yeonjin Lee of Suwon-si (KR)

Jimin Choi of Suwon-si (KR)

Jongmin Lee of Suwon-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18230768 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The semiconductor package described in the abstract consists of multiple stacked semiconductor chips, with each chip having a circuit layer, through-silicon via, and bump pad on the substrate. The uppermost chip includes a circuit layer and a thermal path via in the substrate.

  • The semiconductor package includes a plurality of first semiconductor chips stacked sequentially.
  • Each first semiconductor chip has a circuit layer, through-silicon via, and bump pad on the substrate.
  • The uppermost chip in the stack is a second semiconductor chip with a circuit layer and thermal path via in the substrate.

Potential Applications

The technology described in this patent application could be applied in:

  • High-performance computing systems
  • Data centers
  • Telecommunications infrastructure

Problems Solved

This technology addresses the following issues:

  • Thermal management in stacked semiconductor packages
  • Increasing performance and efficiency in electronic devices

Benefits

The benefits of this technology include:

  • Improved thermal dissipation
  • Higher processing speeds
  • Enhanced overall performance of electronic devices

Potential Commercial Applications

The semiconductor package innovation could be utilized in:

  • High-end smartphones
  • Gaming consoles
  • Automotive electronics

Possible Prior Art

One possible prior art for this technology could be the use of heat sinks or thermal pads in semiconductor packages to address thermal management issues.

Unanswered Questions

How does this technology impact the overall cost of electronic devices?

The cost implications of implementing this technology in electronic devices are not addressed in the article.

What are the environmental implications of using this technology in electronic devices?

The environmental impact of the materials used in the semiconductor package and the disposal of electronic devices incorporating this technology are not discussed in the article.


Original Abstract Submitted

A semiconductor package includes a plurality of first semiconductor chips sequentially stacked, each of the first semiconductor chips including a circuit layer on a first surface of a first substrate, a through-silicon via passing through the first substrate, and a bump pad connected to the through-silicon via, and a second semiconductor chip on an uppermost first semiconductor chip, the second semiconductor chip including a circuit layer on a first surface of a second substrate, and a thermal path via in the second substrate.