18229446. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

From WikiPatents
Jump to navigation Jump to search

SEMICONDUCTOR PACKAGE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Sang Ho Cha of Suwon-si (KR)

Yun-Rae Cho of Suwon-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18229446 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The semiconductor package described in the patent application includes a substrate with a solder resist layer, a semiconductor chip mounted on the substrate, and a bump structure connecting the substrate to the semiconductor chip.

  • The substrate extends in two directions and has an open area on the solder resist layer.
  • The semiconductor chip is positioned on the substrate with one surface facing it.
  • The bump structure connects a connection pad on the open area of the substrate to a connection pad on the surface of the semiconductor chip.
  • The open area on the substrate includes a larger first area and a smaller second area in the peripheral part of the first area.

Potential Applications

  • Semiconductor packaging industry
  • Electronics manufacturing

Problems Solved

  • Improved connection between substrate and semiconductor chip
  • Enhanced reliability of semiconductor packages

Benefits

  • Better performance and durability of electronic devices
  • Increased efficiency in manufacturing processes


Original Abstract Submitted

A semiconductor package, including a substrate extending in first direction and a second direction intersecting the first direction and including a solder resist layer having an open area thereon; a semiconductor chip on the substrate in a third direction, the third direction intersecting the first direction and the second direction, a first surface of the semiconductor chip facing the substrate; and a bump structure in contact with a first connection pad on the open area and a second connection pad on the first surface of the semiconductor chip, and configured to connect the substrate to the semiconductor chip, wherein the open area includes a first area and a second area disposed in a peripheral part of the first area, and wherein a length of the first area in the first direction is greater than a length of the second area in the first direction.