18224948. PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
Organization Name
Inventor(s)
Myungsam Kang of Suwon-si (KR)
PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18224948 titled 'PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
Simplified Explanation
The patent application describes a package substrate that includes a ceramic substrate with multiple insulating layers and a circuit wiring layer. It also includes a redistribution structure on the upper surface of the ceramic substrate, with additional insulating layers and a circuit wiring layer that is electrically connected to the first circuit wiring layer. A capacitor structure is provided at the interface between the ceramic substrate and the redistribution structure, consisting of a lower electrode layer, a dielectric layer, and an upper electrode layer.
- The package substrate includes multiple insulating layers and circuit wiring layers, allowing for complex circuitry to be implemented.
- The redistribution structure enables the connection between the first and second circuit wiring layers, providing flexibility in circuit design.
- The capacitor structure at the interface improves the electrical performance of the substrate.
Potential Applications:
- Electronics manufacturing industry
- Semiconductor packaging industry
Problems Solved:
- Enables the integration of complex circuitry in a compact package substrate
- Provides flexibility in circuit design and interconnectivity
Benefits:
- Improved electrical performance
- Compact and efficient design
- Enhanced circuit integration capabilities
Original Abstract Submitted
A package substrate includes a ceramic substrate including a plurality of first insulating layers and a first circuit wiring layer disposed in the plurality of first insulating layers, a redistribution structure disposed on an upper surface of the ceramic substrate, and including a plurality of second insulating layers and a second circuit wiring layer disposed in the plurality of second insulating layers and electrically connected to the first circuit wiring layer, and a capacitor structure provided at an interface between the ceramic substrate and the redistribution structure, and including a lower electrode layer disposed at the same vertical level as at least a portion of the first circuit wiring layer, a dielectric layer disposed between the ceramic substrate and the redistribution structure, and an upper electrode layer disposed on an upper surface of the dielectric layer.
