18222563. MEMORY SYSTEM, OPERATING METHOD OF THE SAME, AND CONTROLLER OF MEMORY DEVICE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
MEMORY SYSTEM, OPERATING METHOD OF THE SAME, AND CONTROLLER OF MEMORY DEVICE
Organization Name
Inventor(s)
MEMORY SYSTEM, OPERATING METHOD OF THE SAME, AND CONTROLLER OF MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18222563 titled 'MEMORY SYSTEM, OPERATING METHOD OF THE SAME, AND CONTROLLER OF MEMORY DEVICE
Simplified Explanation
The abstract describes a memory system that includes a memory device capable of receiving various signals, including a post package repair (PPR) command from a host. The memory device consists of a memory cell array with multiple memory cells connected to word lines and bit lines, redundancy memory cells connected to redundancy word lines and bit lines, and anti-fuse memory cells. The system also includes a PPR control circuit that communicates with the host to indicate whether a PPR operation on a defective memory cell in the memory cell array has been successful.
- The memory system includes a memory device with a memory cell array, redundancy memory cells, and anti-fuse memory cells.
- The memory device can receive a PPR command from a host.
- The memory cell array consists of multiple memory cells connected to word lines and bit lines.
- The redundancy memory cells are connected to redundancy word lines and bit lines.
- The anti-fuse memory cells are part of the memory device.
- The PPR control circuit communicates with the host to provide information on the success of a PPR operation on a defective memory cell.
Potential applications of this technology:
- Memory systems in electronic devices such as computers, smartphones, and tablets.
- Data storage in various industries including telecommunications, automotive, and aerospace.
- Embedded memory in microcontrollers and other integrated circuits.
Problems solved by this technology:
- Efficient repair of defective memory cells in a memory cell array.
- Enhanced reliability and functionality of memory systems.
- Reduction of manufacturing costs by utilizing redundancy memory cells.
Benefits of this technology:
- Improved memory system performance and reliability.
- Extended lifespan of memory devices.
- Cost-effective repair of memory cells without the need for physical replacement.
Original Abstract Submitted
A memory system including a memory device that receives a plurality of signals including a post package repair (PPR) command from a host, wherein the memory device includes a memory cell array including a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a plurality of redundancy memory cells connected to one or more redundancy word lines and the plurality of bit lines, and anti-fuse memory cells, and a PPR control circuit that transmits to the host whether a PPR operation on a defective memory cell of the memory cell array has passed.
