18221465. SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

HYUEKJAE Lee of SUWON-SI (KR)

MINKI Kim of SUWON-SI (KR)

SEUNGDUK Baek of SUWON-SI (KR)

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18221465 titled 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Simplified Explanation

The semiconductor device described in the patent application involves stacking a first chip and a second chip, with the first chip having a sacrificial layer and the second chip having a thinner upper pad.

  • First chip includes:
    • First substrate
    • First upper pad on upper surface of first substrate
    • First upper insulating layer surrounding lower portion of first upper pad
    • Sacrificial layer surrounding upper portion of first upper pad
  • Second chip includes:
    • Second substrate
    • Second upper pad on upper surface of second substrate
    • Second upper insulating layer surrounding second upper pad, with a thickness less than the first upper pad

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      1. Potential Applications
  • Advanced semiconductor devices
  • Microelectronics
  • Integrated circuits
      1. Problems Solved
  • Improved stacking of chips
  • Enhanced performance of semiconductor devices
  • Better insulation and protection of pads
      1. Benefits
  • Higher efficiency in semiconductor devices
  • Increased reliability
  • Compact design for electronic devices


Original Abstract Submitted

A semiconductor device includes a first chip and a second chip stacked on the first chip. The first chip includes a first substrate, a first upper pad on an upper surface of the first substrate, a first upper insulating layer surrounding a lower portion of the first upper pad and a sacrificial layer surrounding an upper portion of the first upper pad. The second chip includes a second substrate, a second upper pad on an upper surface of the second substrate and a second upper insulating layer surrounding the second upper pad, wherein a thickness of the second upper pad is less than a thickness of the first upper pad.