18220363. Storage System and Method for Circuit-Bounded-Array-Based Time and Temperature Tag Management and Inference of Read Thresholds simplified abstract (Western Digital Technologies, Inc.)

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Storage System and Method for Circuit-Bounded-Array-Based Time and Temperature Tag Management and Inference of Read Thresholds

Organization Name

Western Digital Technologies, Inc.

Inventor(s)

Alexander Bazarsky of Holon (IL)

Ariel Navon of Revava (IL)

Eran Sharon of Rishon Lezion (IL)

David Avraham of San Jose CA (US)

Nika Yanuka of Hadera (IL)

Idan Alrod of Herzeliya (IL)

Storage System and Method for Circuit-Bounded-Array-Based Time and Temperature Tag Management and Inference of Read Thresholds - A simplified explanation of the abstract

This abstract first appeared for US patent application 18220363 titled 'Storage System and Method for Circuit-Bounded-Array-Based Time and Temperature Tag Management and Inference of Read Thresholds

Simplified Explanation

Abstract

A storage system with an inference engine that can determine a read threshold based on various memory parameters. This read threshold can be used during regular read operations or error handling processes. By using a machine-learning approach, the accuracy of the read threshold can be greatly improved, resulting in reduced bit error rate, improved latency, throughput, power consumption, and quality of service. Additionally, a circuit-bounded array is utilized to manage updates to time and temperature tag information and to infer read thresholds.

Patent/Innovation Explanation

  • A storage system with an inference engine that can determine a read threshold based on memory parameters.
  • The read threshold can be used during regular read operations or error handling processes.
  • Utilizes a machine-learning approach to improve the accuracy of the read threshold.
  • A circuit-bounded array is used to manage updates to time and temperature tag information and to infer read thresholds.

Potential Applications

  • Data storage systems
  • Computer memory systems
  • Error handling processes in storage devices

Problems Solved

  • Inaccurate read thresholds in storage systems
  • High bit error rate
  • Poor latency, throughput, power consumption, and quality of service

Benefits

  • Improved accuracy of read thresholds
  • Reduced bit error rate
  • Improved latency, throughput, power consumption, and quality of service


Original Abstract Submitted

A storage system has an inference engine that can infer a read threshold based on a plurality of parameters of the memory. The read threshold can be used in reading a wordline in the memory during a regular read operation or as part of an error handling process. Using a machine-learning-based approach to infer a read threshold can provide significant improvement in read threshold accuracy, which can reduce bit error rate and improve latency, throughput, power consumption, and quality of service. In another embodiment, a circuit-bounded array is used to manage updates to time and temperature tag information and to infer read thresholds.