18213850. SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
- 1 SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 How does this technology compare to existing semiconductor packaging methods in terms of cost-effectiveness?
- 1.11 What are the specific electronic devices that could benefit the most from this advanced semiconductor packaging technology?
- 1.12 Original Abstract Submitted
SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME
Organization Name
Inventor(s)
DONGHYEON Jang of Suwon-si (KR)
SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18213850 titled 'SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME
Simplified Explanation
The present disclosure relates to a semiconductor package and a manufacturing method thereof, including preparing a glass substrate with a groove and a hole, forming a conductive connection member inside the hole, attaching a semiconductor chip inside the groove, and forming redistribution structures on both sides of the glass substrate for connection with the chip and the conductive member.
- Glass substrate with groove and hole
- Conductive connection member filling the hole
- Semiconductor chip attached inside the groove
- First redistribution structure on one side of the glass substrate
- Second redistribution structure on the other side of the glass substrate
Potential Applications
The technology described in this patent application could be applied in the manufacturing of advanced semiconductor packages for various electronic devices, such as smartphones, tablets, and computers.
Problems Solved
This technology solves the problem of efficiently connecting semiconductor chips to glass substrates while providing reliable electrical connections for improved performance and durability of electronic devices.
Benefits
The benefits of this technology include enhanced electrical connectivity, improved thermal management, and potentially reduced manufacturing costs for semiconductor packages.
Potential Commercial Applications
The potential commercial applications of this technology could be in the semiconductor industry for the production of high-performance electronic devices with compact and reliable packaging solutions.
Possible Prior Art
One possible prior art for this technology could be the use of traditional ceramic substrates for semiconductor packaging, which may not offer the same level of performance and reliability as glass substrates with conductive connection members.
Unanswered Questions
How does this technology compare to existing semiconductor packaging methods in terms of cost-effectiveness?
The article does not provide specific information on the cost-effectiveness of this technology compared to existing methods. Further research or data would be needed to address this question.
What are the specific electronic devices that could benefit the most from this advanced semiconductor packaging technology?
The article does not mention specific electronic devices that could benefit the most from this technology. Additional analysis or market research would be required to identify the target applications for this innovation.
Original Abstract Submitted
The present disclosure relates to a semiconductor package and a manufacturing method thereof, and a manufacturing method of a semiconductor package according to an embodiment includes: preparing a glass substrate that includes a groove and a hole positioned around the groove; forming a conductive connection member to fill inside the hole of the glass substrate; attaching a semiconductor chip inside the groove of the glass substrate; forming a first redistribution structure for connection with the semiconductor chip and the conductive connection member on a first side of the glass substrate; and forming a second redistribution structure for connection with the conductive connection member on a second side of the glass substrate.
