18210729. SEMICONDUCTOR DEVICE simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR DEVICE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Seungyoon Kim of Suwon-si (KR)

Doohyun Kim of Suwon-si (KR)

Hyunju Kim of Suwon-si (KR)

Heesuk Kim of Suwon-si (KR)

Yejin Park of Suwon-si (KR)

Jaehwang Sim of Suwon-si (KR)

Jongseon Ahn of Suwon-si (KR)

SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18210729 titled 'SEMICONDUCTOR DEVICE

Simplified Explanation

The semiconductor device described in the patent application includes a lower circuit pattern on a substrate, a common source plate (CSP) on the lower circuit pattern, gate electrodes spaced apart from each other on the CSP in a first direction perpendicular to the substrate's upper surface, a first insulation pattern structure adjacent to the gate electrode structure, and a first division pattern on the CSP in a third direction parallel to the substrate's upper surface and crossing the second direction.

  • Lower circuit pattern on a substrate
  • Common source plate (CSP) on the lower circuit pattern
  • Gate electrodes spaced apart on the CSP in a first direction
  • First insulation pattern structure adjacent to the gate electrode structure
  • First division pattern on the CSP in a third direction
      1. Potential Applications

- Semiconductor manufacturing - Electronics industry

      1. Problems Solved

- Efficient organization of components on a semiconductor device - Improved performance and functionality of the device

      1. Benefits

- Enhanced functionality of semiconductor devices - Increased efficiency in manufacturing processes - Improved overall performance of electronic devices


Original Abstract Submitted

A semiconductor device includes a lower circuit pattern on a substrate, a common source plate (CSP) on the lower circuit pattern, a gate electrode structure including gate electrodes spaced apart from each other on the CSP in a first direction that is substantially perpendicular to an upper surface of the substrate, each of the gate electrodes extending in a second direction that is substantially parallel to the upper surface of the substrate, a first insulation pattern structure on a portion of the CSP that is adjacent to the gate electrode structure in the second direction, and a first division pattern extending on the CSP in a third direction that is substantially parallel to the upper surface of the substrate and that crosses the second direction, the first division pattern extending through a portion of the gate electrode structure that is adjacent to the first insulation pattern structure.