18206278. SEMICONDUCTOR DESIGN OPTIMIZATION SYSTEMS AND METHODS OF OPERATION THEREOF simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
- 1 SEMICONDUCTOR DESIGN OPTIMIZATION SYSTEMS AND METHODS OF OPERATION THEREOF
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 SEMICONDUCTOR DESIGN OPTIMIZATION SYSTEMS AND METHODS OF OPERATION THEREOF - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
SEMICONDUCTOR DESIGN OPTIMIZATION SYSTEMS AND METHODS OF OPERATION THEREOF
Organization Name
Inventor(s)
Jae Choon Kim of Suwon-si (KR)
Jeong-Hyeon Park of Suwon-si (KR)
SEMICONDUCTOR DESIGN OPTIMIZATION SYSTEMS AND METHODS OF OPERATION THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 18206278 titled 'SEMICONDUCTOR DESIGN OPTIMIZATION SYSTEMS AND METHODS OF OPERATION THEREOF
Simplified Explanation
The semiconductor design optimization system described in the abstract is a system that utilizes a database to store design data, preprocesses the data to generate training data, trains a physical property prediction model using the training data, generates predicted physical property data for each region of a semiconductor device, and optimizes the design layout based on the predicted physical property data.
- Data base to store design data
- Training data preprocessing unit to generate training data
- Data learning unit to train a physical property prediction model
- Physical property prediction unit to generate predicted physical property data for each region of a semiconductor device
- Layout generator to optimize the design layout based on predicted physical property data
Potential Applications
This technology can be applied in the semiconductor industry for optimizing the design layout of semiconductor devices to improve their physical properties and performance.
Problems Solved
1. Efficient optimization of semiconductor design layouts 2. Prediction of physical properties of semiconductor devices
Benefits
1. Improved performance of semiconductor devices 2. Cost-effective design optimization 3. Enhanced accuracy in predicting physical properties
Potential Commercial Applications
Optimized semiconductor design layouts can be used in various commercial applications such as electronics manufacturing, semiconductor fabrication, and integrated circuit design.
Possible Prior Art
One possible prior art in this field is the use of machine learning algorithms for predicting physical properties of materials in the semiconductor industry.
Unanswered Questions
How does the system handle variations in physical properties due to different manufacturing processes?
The abstract does not provide information on how the system accounts for variations in physical properties caused by different manufacturing processes.
What is the computational efficiency of the layout optimization process?
The abstract does not mention the computational efficiency of the layout optimization process and whether it can be scaled for large-scale semiconductor designs.
Original Abstract Submitted
A semiconductor design optimization system that includes: a data base configured to store design data, a training data preprocessing unit configured to preprocess the design data and generate training data, a data learning unit configured to generate a physical property prediction model by training using the training data, a physical property prediction unit configured to generate predicted physical property data including information associated with predicted physical property values for each region of a semiconductor device to be fabricated, wherein the physical property prediction unit is configured to input, into the physical property prediction model, input data including information associated with design drawings of the semiconductor device to be fabricated, and a layout generator configured generate a design layout optimized to distribute the predicted physical property values for each region of the semiconductor device to be fabricated by modifying the design drawings based on the predicted physical property data.
