18198064. METHODS FOR PATTERNING SUBSTRATES TO ADJUST VOLTAGE PROPERTIES simplified abstract (Applied Materials, Inc.)

METHODS FOR PATTERNING SUBSTRATES TO ADJUST VOLTAGE PROPERTIES

Organization Name

Applied Materials, Inc.

Inventor(s)

Steven C. H. Hung of Sunnyvale CA (US)

Yixiong Yang of San Jose CA (US)

Tianyi Huang of Santa Clara CA (US)

Srinivas Gandikota of Santa Clara CA (US)

METHODS FOR PATTERNING SUBSTRATES TO ADJUST VOLTAGE PROPERTIES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18198064 titled 'METHODS FOR PATTERNING SUBSTRATES TO ADJUST VOLTAGE PROPERTIES

Simplified Explanation

The abstract describes a method for adjusting the threshold voltage in a field-effect-transistor (FET) device. Here is a simplified explanation of the abstract:

• The method involves depositing a diffusion barrier layer over a gate dielectric layer in different regions of a semiconductor structure.
• A portion of the deposited diffusion layer is removed in one region, while a portion of the deposited diffusion barrier layer is partially removed in another region.
• A dipole layer is then deposited over the gate dielectric layer in one region and over the diffusion barrier layer in the other regions.
• An annealing process is performed to drive dipole dopants from the dipole layer into the gate dielectric layer.

Potential applications of this technology:

• This method can be used in the fabrication of field-effect-transistor (FET) devices.
• It can help in adjusting the threshold voltage of FET devices, which is important for their performance and functionality.

Problems solved by this technology:

• The method provides a way to adjust the threshold voltage in FET devices, which is crucial for controlling their operation.
• It allows for precise tuning of the threshold voltage without the need for complex fabrication processes.

Benefits of this technology:

• The method offers a simple and effective way to adjust the threshold voltage in FET devices.
• It provides flexibility in controlling the performance characteristics of FET devices.
• The process can be easily integrated into existing semiconductor fabrication processes.

Original Abstract Submitted

A method of adjusting a threshold voltage in a field-effect-transistor (FET) device includes performing a deposition process to deposit a diffusion barrier layer over a gate dielectric layer in a first region, a second region, and a third region of a semiconductor structure, performing a first patterning process to remove a portion of the deposited diffusion layer in the first region, performing a second patterning process to partially remove a portion of the deposited diffusion barrier layer in the second region, performing a dipole layer deposition process to deposit a dipole layer over the gate dielectric layer in the first region, and the diffusion barrier layer in the second region and in the third region, and performing an annealing process to drive dipole dopants from the dipole layer into the gate dielectric layer.