18195657. SEMICONDUCTOR DEVICE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR DEVICE
Organization Name
Inventor(s)
Seungmin Song of Suwon-si (KR)
SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18195657 titled 'SEMICONDUCTOR DEVICE
Simplified Explanation
The semiconductor device described in the patent application includes an active region on a substrate, with channel layers on the active region that are spaced apart from each other. The channel layers consist of lower and upper layers, and there is an intermediate insulating layer between the uppermost lower channel layer and the lowermost upper channel layer. The device also has a gate that intersects the active region, with a lower gate electrode surrounding the lower channel layers and an upper gate electrode surrounding the upper channel layers. An insulating pattern is present between the upper and lower gate electrodes on one side of the intermediate insulating layer. Source/drain regions are located on at least one side of the gate, with lower source/drain regions connected to the lower channel layers and upper source/drain regions connected to the upper channel layers. Additionally, there is a contact plug that includes a horizontal extension portion connected to the lower source/drain regions and a vertical extension portion connected to the horizontal extension portion.
- The semiconductor device has an active region with channel layers that are spaced apart and include both lower and upper layers.
- An intermediate insulating layer is present between the uppermost lower channel layer and the lowermost upper channel layer.
- The gate intersects the active region and includes both lower and upper gate electrodes.
- An insulating pattern is located between the upper and lower gate electrodes on one side of the intermediate insulating layer.
- Source/drain regions are positioned on at least one side of the gate, with lower source/drain regions connected to the lower channel layers and upper source/drain regions connected to the upper channel layers.
- The contact plug includes a horizontal extension portion connected to the lower source/drain regions and a vertical extension portion connected to the horizontal extension portion.
Potential applications of this technology:
- Semiconductor devices with improved performance and functionality.
- Enhanced integration of components on a substrate.
- Increased efficiency and reliability of electronic devices.
Problems solved by this technology:
- Improved control and modulation of current flow in semiconductor devices.
- Reduction of leakage current and power consumption.
- Enhanced scalability and miniaturization of electronic components.
Benefits of this technology:
- Higher performance and functionality in semiconductor devices.
- Improved energy efficiency and reduced power consumption.
- Increased reliability and lifespan of electronic devices.
- Enhanced integration and miniaturization capabilities.
Original Abstract Submitted
A semiconductor device includes an active region on a substrate; channel layers on the active region spaced apart from each other and including lower and upper channel layers; an intermediate insulating layer between an uppermost lower channel layer and a lowermost upper channel layer; a gate intersecting the active region and including a lower gate electrode surrounding the lower channel layers and an upper gate electrode surrounding the upper channel layers; an insulating pattern between the upper and lower gate electrodes on a side of the intermediate insulating layer; source/drain regions on at least one side of the gate, and including lower source/drain regions connected to the lower channel layers and upper source/drain regions connected to the upper channel layers; and a contact plug including a horizontal extension portion connected to the lower source/drain regions, and a vertical extension portion connected to the horizontal extension portion.
