18188368. SEMICONDUCTOR PACKAGES simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGES

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Sang Sub Song of Suwon-si (KR)

Seongho Yoon of Suwon-si (KR)

Ki-Hong Jeong of Suwon-si (KR)

SEMICONDUCTOR PACKAGES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18188368 titled 'SEMICONDUCTOR PACKAGES

Simplified Explanation

The semiconductor package described in the patent application consists of a package substrate with two opposing surfaces. On the first surface, there is a control chip, a mode selection connection terminal between the control chip and the package substrate, and a stack structure of memory chips stacked apart from the control chip. Additionally, there is a first power pad and a wire pad spaced apart on the first surface, a first external connection terminal on the second surface, and first and second interconnection lines within the package substrate. The first power pad is connected to the first external connection terminal through the first interconnection line, while the wire pad is connected to the mode selection connection terminal through the second interconnection line. The first external connection terminal can provide either a ground voltage or a power voltage.

  • The semiconductor package includes a control chip, memory chips, and interconnection lines, all housed within a package substrate.
  • The package substrate has two surfaces, with the control chip and memory chips placed on the first surface.
  • A mode selection connection terminal allows communication between the control chip and the package substrate.
  • The first power pad and wire pad are located on the first surface, spaced apart from the control chip.
  • The first external connection terminal is situated on the second surface of the package substrate.
  • The first interconnection line connects the first power pad to the first external connection terminal.
  • The second interconnection line connects the wire pad to the mode selection connection terminal.
  • The first external connection terminal can provide a ground voltage or a power voltage.

Potential Applications:

  • This semiconductor package can be used in various electronic devices such as smartphones, tablets, and computers.
  • It can be utilized in memory-intensive applications like gaming consoles and data centers.

Problems Solved:

  • The package design allows for efficient power distribution and signal transmission within the semiconductor package.
  • The mode selection connection terminal enables flexible control and configuration of the control chip.
  • The stacked memory chips provide increased memory capacity within a compact package.

Benefits:

  • Improved performance and reliability of electronic devices due to efficient power distribution and signal transmission.
  • Increased memory capacity allows for more data storage and processing capabilities.
  • Compact package design saves space and enables integration into smaller devices.


Original Abstract Submitted

A semiconductor package includes a package substrate having opposing first and second surfaces, a control chip on the first surface, a mode selection connection terminal between the control chip and the package substrate, a stack structure comprising stacked memory chips spaced apart from the control chip on the first surface, a first power pad and a wire pad that are spaced apart at the first surface, a first external connection terminal on the second surface, and first and second interconnection lines in the package substrate. The first power pad and the wire pad are spaced apart from the control chip. The first interconnection line connects the first power pad to the first external connection terminal. The second interconnection line connects the wire pad to the mode selection connection terminal. The first external connection terminal is configured to provide a ground voltage or a power voltage.