18186531. THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE, ELECTRONIC SYSTEM INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

From WikiPatents
Jump to navigation Jump to search

THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE, ELECTRONIC SYSTEM INCLUDING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Moorym Choi of Suwon-si (KR)

Jungtae Sung of Suwon-si (KR)

Sunil Shim of Suwon-si (KR)

Yunsun Jang of Suwon-si (KR)

THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE, ELECTRONIC SYSTEM INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18186531 titled 'THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE, ELECTRONIC SYSTEM INCLUDING THE SAME

Simplified Explanation

The abstract describes a three-dimensional semiconductor memory device that includes a substrate, a peripheral circuit structure, and a cell array structure. The cell array structure consists of a stack structure with interlayer insulating layers and gate electrodes, as well as three sequentially stacked source conductive patterns made of different materials. Vertical channel structures are included, which extend into the lower portion of the first source conductive pattern through the stack structure. The first to third source conductive patterns extend from the cell array region to the cell array contact region, and the vertical channel structures include vertical semiconductor patterns that contact the first source conductive pattern.

  • The patent describes a three-dimensional semiconductor memory device with a unique cell array structure.
  • The device includes a stack structure with alternating insulating layers and gate electrodes.
  • Three different source conductive patterns are stacked on the stack structure.
  • Vertical channel structures are included, extending into the first source conductive pattern.
  • The vertical channel structures consist of vertical semiconductor patterns.
  • The first to third source conductive patterns extend from the cell array region to the cell array contact region.

Potential Applications

  • This technology can be used in various memory devices, such as solid-state drives (SSDs) and random-access memory (RAM) modules.
  • It can improve the storage capacity and performance of these memory devices.

Problems Solved

  • The three-dimensional structure allows for increased storage capacity in a smaller footprint.
  • The vertical channel structures improve the efficiency and performance of the memory device.
  • The use of different source conductive patterns with unique materials enhances the functionality of the device.

Benefits

  • Higher storage capacity due to the three-dimensional structure.
  • Improved performance and efficiency of the memory device.
  • Enhanced functionality through the use of different source conductive patterns.


Original Abstract Submitted

A three-dimensional semiconductor memory device is provided. The memory device includes a substrate, a peripheral circuit structure on the substrate, and a cell array structure on the peripheral circuit structure and including a cell array region and a cell array contact region. The cell array structure includes a stack structure including alternately stacked interlayer insulating layers and gate electrodes, a first source conductive pattern, a second source conductive pattern, and a third source conductive pattern sequentially stacked on the stack structure. The first to third source conductive patterns include different materials from each other. Vertical channel structures extending into a lower portion of the first source conductive pattern through the stack structure is included. The first to third source conductive patterns extend from the cell array region to the cell array contact region. The vertical channel structures include vertical semiconductor patterns that contact to the first source conductive pattern.