18180720. SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Te-Chih Hsiung of Taipei City (TW)

Yun-Hua Chen of Hsinchu County (TW)

Bing-Sian Wu of Hsinchu City (TW)

Yi-Hsuan Chiu of Hsinchu City (TW)

Yu-Wei Chang of Hsinchu City (TW)

Wen-Kuo Hsieh of Taipei City (TW)

Chih-Yuan Ting of Taipei City (TW)

Huan-Just Lin of Hsinchu City (TW)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18180720 titled 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Simplified Explanation

The method described in the patent application involves a process for fabricating a semiconductor device with improved source/drain contacts. Here are the key points of the innovation:

• Forming a dummy gate over a semiconductor fin
• Forming a source/drain epitaxial structure adjacent to the dummy gate
• Depositing an interlayer dielectric (ILD) layer to cover the source/drain epitaxial structure
• Replacing the dummy gate with a gate structure
• Forming a dielectric structure to cut the gate structure, with a portion embedded in the ILD layer
• Recessing the embedded portion of the dielectric structure
• Removing a portion of the ILD layer over the source/drain epitaxial structure
• Forming a source/drain contact in the ILD layer and in contact with the dielectric structure

Potential Applications: - This technology can be applied in the semiconductor industry for manufacturing advanced integrated circuits with improved source/drain contacts.

Problems Solved: - The innovation addresses the challenge of achieving reliable and efficient source/drain contacts in semiconductor devices.

Benefits: - Enhanced performance and reliability of semiconductor devices - Improved manufacturing process efficiency

Potential Commercial Applications:

1. 1. 1. Improving Source/Drain Contacts in Semiconductor Devices for Enhanced Performance

Possible Prior Art: - Previous methods for forming source/drain contacts in semiconductor devices may not have addressed the specific challenges and improvements described in this patent application.

Unanswered Questions:

1. 1. 1. How does this method compare to existing techniques for forming source/drain contacts in semiconductor devices?

- Answer: This method offers a novel approach to improving source/drain contacts by embedding a dielectric structure in the ILD layer, which may provide better performance and reliability compared to traditional methods.

1. 1. 1. What impact could this innovation have on the overall efficiency and cost-effectiveness of semiconductor device manufacturing?

- Answer: By enhancing the source/drain contacts, this technology could lead to improved device performance and potentially reduce manufacturing costs in the long run.

Original Abstract Submitted

A method includes forming a dummy gate over a semiconductor fin; forming a source/drain epitaxial structure over the semiconductor fin and adjacent to the dummy gate; depositing an interlayer dielectric (ILD) layer to cover the source/drain epitaxial structure; replacing the dummy gate with a gate structure; forming a dielectric structure to cut the gate structure, wherein a portion of the dielectric structure is embedded in the ILD layer; recessing the portion of the dielectric structure embedded in the ILD layer; after recessing the portion of the dielectric structure, removing a portion of the ILD layer over the source/drain epitaxial structure; and forming a source/drain contact in the ILD layer and in contact with the portion of the dielectric structure.