18177756. MEMORY DEVICE AND MEMORY SYSTEM simplified abstract (SK hynix Inc.)
Contents
MEMORY DEVICE AND MEMORY SYSTEM
Organization Name
Inventor(s)
Minseong Kim of Gyeonggi-do (KR)
MEMORY DEVICE AND MEMORY SYSTEM - A simplified explanation of the abstract
This abstract first appeared for US patent application 18177756 titled 'MEMORY DEVICE AND MEMORY SYSTEM
Simplified Explanation
The memory device described in the patent application includes a memory cell array, a time table, and a refresh control circuit. The refresh control circuit reads field data from the time table based on an access command for a specific row, determines whether to issue a refresh request signal for that row, and updates the field data using current clock data.
- Memory device with memory cell array, time table, and refresh control circuit
- Refresh control circuit reads field data from time table for specific rows
- Determines whether to issue refresh request signal based on current clock data and field data
- Updates field data using current clock data
Potential Applications
This technology could be applied in various memory devices such as RAM, flash memory, and solid-state drives to improve memory management and efficiency.
Problems Solved
1. Efficient memory management 2. Timely refresh of memory cells
Benefits
1. Improved memory performance 2. Enhanced data retention 3. Optimal memory refresh cycles
Potential Commercial Applications
"Memory Management Technology for Enhanced Performance"
Possible Prior Art
There are existing memory management techniques that involve refreshing memory cells at specific intervals to maintain data integrity. However, the specific method described in this patent application may be a novel approach to memory refresh control.
=== What are the specific criteria for determining when to issue a refresh request signal? The refresh control circuit determines whether to issue a refresh request signal based on current clock data and the field data read from the time table.
=== How does the memory device handle access commands for different rows in the memory cell array? The memory device reads field data from the time table according to the access command for a specific row, allowing the refresh control circuit to make decisions based on the data retrieved.
Original Abstract Submitted
A memory device includes a memory cell array including a plurality of rows; a time table including a plurality of fields respectively corresponding to the rows; and a refresh control circuit configured to read field data from a k-th field of the time table according to an access command for a k-th row among the rows, where k is a natural number, determine whether to issue a refresh request signal for the k-th row based on current clock data and the field data, and update the field data of the k-th field using the current clock data.
