18175456. SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD OF CONTROLLING SEMICONDUCTOR INTEGRATED CIRCUIT, AND CIRCUIT SYSTEM simplified abstract (Kioxia Corporation)

SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD OF CONTROLLING SEMICONDUCTOR INTEGRATED CIRCUIT, AND CIRCUIT SYSTEM

Organization Name

Kioxia Corporation

Inventor(s)

Kiyohito Sato of Kawasaki Kanagawa (JP)

SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD OF CONTROLLING SEMICONDUCTOR INTEGRATED CIRCUIT, AND CIRCUIT SYSTEM - A simplified explanation of the abstract

This abstract first appeared for US patent application 18175456 titled 'SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD OF CONTROLLING SEMICONDUCTOR INTEGRATED CIRCUIT, AND CIRCUIT SYSTEM

Simplified Explanation

The abstract describes a patent application for a semiconductor integrated circuit that includes multiple oscillation circuits and a detection circuit to synchronize clock signals and establish a frequency locked state.

• The first oscillation circuit receives a clock signal and outputs a synchronized clock signal.
• The second oscillation circuit receives a control signal and outputs a clock signal with a corresponding frequency.
• The detection circuit detects the frequency difference between the synchronized clock signal and the output clock signal.
• The determination circuit decides if a frequency locked state is achieved between the clock signals.
• The control circuit adjusts the control signal to minimize the frequency difference before establishing the frequency locked state.

Potential Applications

This technology can be applied in various electronic devices requiring precise clock signal synchronization, such as communication systems, data processing units, and timing circuits.

Problems Solved

1. Ensures accurate synchronization of clock signals in semiconductor integrated circuits. 2. Facilitates the establishment of a frequency locked state for improved performance and reliability.

Benefits

1. Enhances the overall efficiency and reliability of electronic devices. 2. Reduces the risk of timing errors and signal interference. 3. Optimizes the performance of semiconductor integrated circuits.

Potential Commercial Applications

Optimized Clock Signal Synchronization Technology for Enhanced Semiconductor Performance

Possible Prior Art

Prior art in the field of semiconductor integrated circuits may include similar technologies for clock signal synchronization and frequency control.

How does this technology compare to existing methods of clock signal synchronization in terms of efficiency and accuracy?

This article does not provide a direct comparison with existing methods, leaving room for further investigation into the advantages of this technology.

What are the specific parameters that the control circuit adjusts in the control signal to minimize the frequency difference between clock signals?

The article does not delve into the specific parameters adjusted by the control circuit, prompting a deeper exploration of the inner workings of this technology.

Original Abstract Submitted

In a semiconductor integrated circuit, a first oscillation circuit receives a first clock signal and outputs a second clock signal synchronized with the first clock signal in frequency and phase. A second oscillation circuit receives a control signal and outputs a third clock signal having a frequency corresponding to the received control signal. A detection circuit detects a frequency difference between the second clock signal and the third clock signal. A determination circuit determines whether a frequency locked state is established between the first clock signal and the second clock signal. A control circuit varies the control signal, such that the frequency difference decreases while the frequency locked state has not been established and increases after the frequency locked state is established.