18169769. SEMICONDUCTOR MEMORY DEVICES simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR MEMORY DEVICES
Organization Name
Inventor(s)
Jongcheol Kim of Suwon-si (KR)
Hyunsung Shin of Suwon-si (KR)
SEMICONDUCTOR MEMORY DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18169769 titled 'SEMICONDUCTOR MEMORY DEVICES
Simplified Explanation
The semiconductor memory device described in the patent application consists of a memory cell array, a data input/output (I/O) buffer, an I/O gating circuit, and a control logic circuit. The memory cell array is composed of multiple sub-array blocks arranged in two directions. The data I/O buffer facilitates the exchange of user data between the memory controller and the device through I/O pads. The I/O gating circuit connects the data I/O buffer to the memory cell array and controls the mapping relationship between the sub-array blocks and the I/O pads based on a mapping control signal. This mapping reduces uncorrectable errors detected by an error correction code engine in the memory controller. The control logic circuit generates the mapping control signal based on identifier information indicating the type of central processing unit in the memory controller.
- The semiconductor memory device includes a memory cell array with multiple sub-array blocks arranged in two directions.
- The data I/O buffer enables the exchange of user data between the memory controller and the device through I/O pads.
- The I/O gating circuit connects the data I/O buffer to the memory cell array and controls the mapping relationship between sub-array blocks and I/O pads.
- The mapping control signal is generated by the control logic circuit based on identifier information indicating the type of central processing unit in the memory controller.
- The purpose of the invention is to reduce uncorrectable errors detected by the error correction code engine in the memory controller.
Potential applications of this technology:
- Semiconductor memory devices used in various electronic devices such as computers, smartphones, and tablets.
- Memory systems requiring high data transfer rates and low error rates.
Problems solved by this technology:
- Reduces uncorrectable errors detected by the error correction code engine, improving the reliability of the memory device.
- Enhances data transfer efficiency between the memory controller and the memory cell array.
Benefits of this technology:
- Improved reliability of semiconductor memory devices.
- Increased data transfer efficiency.
- Enhanced performance and functionality of electronic devices.
Original Abstract Submitted
A semiconductor memory device includes a memory cell array, a data input/output (I/O) buffer, an I/O gating circuit and a control logic circuit. The memory cell array includes a plurality of sub array blocks arranged in a first direction and a second direction. The data I/O buffer exchanges user data with a memory controller through I/O pads. The I/O gating circuit is connected to the data I/O buffer through data buses and connected to the memory cell array through data I/O lines, and programs mapping relationship between the sub array blocks and the I/O pads, based on a mapping control signal such that uncorrectable errors that are detected by an error correction code engine in the memory controller are reduced. The control logic circuit generates the mapping control signal based on identifier information indicating a type of a central processing unit of the memory controller.
