18166322. SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Younghun Cheong of Suwon-si (KR)

Minchul Cho of Suwon-si (KR)

Cheolsoo Han of Suwon-si (KR)

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18166322 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE

Simplified Explanation

The abstract describes a semiconductor package that includes multiple semiconductor chips stacked on a package substrate in a stair-step configuration. The uppermost chip has a free end portion. Conductive wires connect the chip pads of the semiconductor chips to the substrate pads of the package substrate. The package also includes inclined support structures that are attached to the package substrate and the free end portion of the uppermost chip.

  • The semiconductor package includes a package substrate and multiple semiconductor chips stacked in a stair-step configuration.
  • The uppermost chip has a free end portion.
  • Conductive wires are used to connect the chip pads of the semiconductor chips to the substrate pads of the package substrate.
  • Inclined support structures are attached to the package substrate and the free end portion of the uppermost chip.

Potential applications of this technology:

  • This semiconductor package design can be used in various electronic devices such as smartphones, tablets, and computers.
  • It can be utilized in high-density integrated circuits where space is limited.
  • The stacked configuration allows for increased functionality and performance in a compact form factor.

Problems solved by this technology:

  • The stair-step configuration and inclined support structures provide stability and support to the stacked semiconductor chips, reducing the risk of damage or disconnection.
  • The conductive wires ensure reliable electrical connections between the chips and the substrate, preventing signal loss or malfunction.

Benefits of this technology:

  • The compact design of the semiconductor package allows for efficient use of space in electronic devices.
  • The stacked configuration enables higher integration and increased functionality.
  • The inclined support structures provide mechanical stability, reducing the risk of failure due to vibrations or shocks.
  • The reliable electrical connections ensure proper signal transmission and overall performance of the semiconductor package.


Original Abstract Submitted

A semiconductor package includes a package substrate, a plurality of first semiconductor chips stacked on an upper surface of the package substrate in a stair-step configuration, the plurality of first semiconductor chips having an uppermost semiconductor chip at a first height from the upper surface of the package substrate, the uppermost semiconductor chip including a free end portion. Conductive wires respectively electrically connect chip pads of the first semiconductor chips to substrate pads of the package substrate. A plurality of first support structures each have a first end attached to the upper surface of the package substrate and an opposite second end attached to the free end portion of the uppermost semiconductor chip. The first support structures are inclined at an angle relative to the package substrate.

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