18165419. SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Hyeonjun Song of Suwon-si (KR)

Jungmin Ko of Suwon-Si (KR)

Taehyeong Kim of Suwon-si (KR)

Youngwoo Lim of Suwon-Si (KR)

Dongki Choi of Suwon-Si (KR)

SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18165419 titled 'SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS

Simplified Explanation

The patent application describes a semiconductor package that includes a base chip and multiple stacked semiconductor chips. It also includes bumps, organic material layers, underfill layers, and an encapsulant.

  • The semiconductor package consists of a base chip and multiple stacked semiconductor chips.
  • Bumps are placed between the base chip and the lowermost semiconductor chip, as well as between each semiconductor chip.
  • Organic material layers are placed between the base chip and the lowermost semiconductor chip, as well as between each semiconductor chip.
  • Underfill layers surround the bumps and extend between the base chip and the lowermost semiconductor chip, as well as between the semiconductor chips.
  • An encapsulant covers the base chip, semiconductor chips, and underfill layers.

Potential applications of this technology:

  • This semiconductor package can be used in various electronic devices such as smartphones, tablets, and computers.
  • It can be applied in automotive electronics, medical devices, and industrial equipment.

Problems solved by this technology:

  • The semiconductor package provides improved electrical connections and thermal management between the base chip and the stacked semiconductor chips.
  • It helps to reduce the risk of damage or failure due to mechanical stress or temperature variations.

Benefits of this technology:

  • The design of the semiconductor package allows for efficient stacking of multiple semiconductor chips, increasing the overall functionality and performance of the device.
  • The use of underfill layers and an encapsulant provides protection and stability to the package, enhancing its reliability and durability.


Original Abstract Submitted

A semiconductor package includes a base chip; semiconductor chips stacked on the base chip; bumps, a lowermost bump of the bumps disposed between the base chip and a lowermost semiconductor chip of the semiconductor chips, and each of the bumps except the lowermost bump respectively disposed between the semiconductor chips; organic material layers, a lowermost organic material layer of the organic material layers disposed between the base chip and the lowermost semiconductor chip, and each of organic material layers except the lowermost organic material layer respectively disposed between the plurality of semiconductor chips; underfill layers respectively surrounding the plurality of bumps, the underfill layers extending between the base chip and the lowermost semiconductor chip and between the semiconductor chips; and an encapsulant covering the base chip, the semiconductor chips, and the underfill layers.