18165412. STACK-TYPE SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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STACK-TYPE SEMICONDUCTOR PACKAGE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

KYUNG DON Mun of SUWON-SI (KR)

JONGYOUN Kim of SUWON-SI (KR)

JAEGWON Jang of SUWON-SI (KR)

STACK-TYPE SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18165412 titled 'STACK-TYPE SEMICONDUCTOR PACKAGE

Simplified Explanation

The abstract describes a semiconductor package that includes multiple semiconductor dies stacked together. The package includes a buffer die, one or more first semiconductor dies, and a second semiconductor die. The second semiconductor die has a first layer with memory blocks and a second layer with computing blocks. The first and second layers are in contact with each other, and the memory blocks and computing blocks have pads that are also in contact with each other.

  • A semiconductor package with stacked semiconductor dies
  • Includes a buffer die, first semiconductor dies, and a second semiconductor die
  • The second semiconductor die has a first layer with memory blocks and a second layer with computing blocks
  • The first and second layers are in contact with each other
  • The memory blocks and computing blocks have pads that are in contact with each other

Potential Applications

  • Semiconductor packaging for electronic devices
  • Memory and computing integration in a single package

Problems Solved

  • Efficient stacking of semiconductor dies
  • Integration of memory and computing blocks

Benefits

  • Compact and space-saving design
  • Improved performance and efficiency in electronic devices
  • Simplified manufacturing process


Original Abstract Submitted

A semiconductor package includes a buffer die. One or more first semiconductor dies are stacked on the buffer die such that active surfaces face the buffer die. A second semiconductor die is stacked on the first semiconductor dies. The second semiconductor die includes a first layer and a second layer disposed thereon. The first layer includes a first semiconductor substrate. First memory blocks are disposed on the first semiconductor substrate. A first penetration electrode vertically penetrates the first semiconductor substrate and is connected to the first memory blocks. The second layer includes a second semiconductor substrate and computing blocks disposed on the second semiconductor substrate. The first and second layers have active surfaces in contact with each other. The first memory block aid the computing block have first and second pads, respectively, in contact with each other.