18163378. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18163378 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The abstract of the patent application describes a semiconductor package that includes a base wiring structure, a first bridge chip, a cache memory chip, and logic semiconductor chips. The first bridge chip and the cache memory chip are placed on the base wiring structure, while the logic semiconductor chips are adjacent to each other on the first bridge chip and the cache memory chip. Each logic semiconductor chip has its own cache memory. The first bridge chip overlaps at least two logic semiconductor chips in a vertical direction and is electrically connected to them through first bridge wirings. The cache memory chip also overlaps the cache memory of at least one logic semiconductor chip in the vertical direction and is electrically connected to it.
- The semiconductor package includes a base wiring structure, a first bridge chip, a cache memory chip, and logic semiconductor chips.
- The first bridge chip and the cache memory chip are placed on the base wiring structure, while the logic semiconductor chips are adjacent to each other on the first bridge chip and the cache memory chip.
- Each logic semiconductor chip has its own cache memory.
- The first bridge chip overlaps at least two logic semiconductor chips in a vertical direction.
- The first bridge chip is electrically connected to at least two logic semiconductor chips through first bridge wirings.
- The cache memory chip overlaps the cache memory of at least one logic semiconductor chip in the vertical direction.
- The cache memory chip is electrically connected to the cache memory of at least one logic semiconductor chip.
Potential Applications
- This semiconductor package design can be used in various electronic devices that require high-performance logic and cache memory integration, such as computers, smartphones, and gaming consoles.
- It can be applied in data centers and cloud computing systems to enhance processing speed and efficiency.
Problems Solved
- The design solves the problem of limited space in semiconductor packages by efficiently integrating logic semiconductor chips and cache memory chips.
- It addresses the challenge of maintaining high-speed data transfer between logic chips and cache memory chips.
Benefits
- The integration of logic semiconductor chips and cache memory chips in close proximity improves data transfer speed and reduces latency.
- The design optimizes space utilization in semiconductor packages, allowing for more efficient and compact electronic devices.
- It enhances overall system performance by reducing the distance between logic chips and cache memory, resulting in faster data access and processing.
Original Abstract Submitted
A semiconductor package may include a base wiring structure, a first bridge chip and a cache memory chip on the base wiring structure and spaced apart from each other in a horizontal direction, and logic semiconductor chips adjacent to each other on the first bridge chip and the cache memory chip. Logic semiconductor chips each may include a cache memory. The first bridge chip may overlap at least two of the logic semiconductor chips in a vertical direction and the first bridge chip may include first bridge wirings electrically connecting at least two of the logic semiconductor chips. The cache memory chip may overlap the cache memory of at least one of the logic semiconductor chips in the vertical direction and the cache memory chip may be electrically connected to the cache memory of at least one of the logic semiconductor chips.
