18163072. Semiconductor Structure and Method Making the Same simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)
Contents
Semiconductor Structure and Method Making the Same
Organization Name
CHANGXIN MEMORY TECHNOLOGIES, INC.
Inventor(s)
Qinghua Han of Hefei City (CN)
Semiconductor Structure and Method Making the Same - A simplified explanation of the abstract
This abstract first appeared for US patent application 18163072 titled 'Semiconductor Structure and Method Making the Same
Simplified Explanation
The present disclosure provides a semiconductor structure for a new 2T0C DRAM structure:
- Channel on a semiconductor substrate for a first transistor
- First bit lines in contact with the first doped region along the first direction
- First word lines surrounding the channel region
- Gate conductive layer and second doped region, channel layer around the outer side of the gate conductive layer
- First semiconductor doped layer and second semiconductor doped layer on the outer side of the channel layer, forming the second transistor
- Second bit line in contact with either the first semiconductor doped layer or the second semiconductor doped layer
- Second word line in contact with the other one of the first semiconductor or the second semiconductor doped layer
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- Potential Applications
This technology can be applied in the development of advanced memory storage devices, specifically in the creation of more efficient and compact DRAM structures.
- Problems Solved
This innovation addresses the need for higher density and faster access times in memory devices by introducing a new 2T0C DRAM structure.
- Benefits
- Improved memory storage capacity - Enhanced performance with faster access times - Reduction in overall size and footprint of memory devices
- Potential Commercial Applications
The technology can be utilized in the production of next-generation memory modules for various electronic devices, such as smartphones, computers, and servers.
- Possible Prior Art
There may be existing patents or publications related to similar semiconductor structures for memory devices, but further research would be needed to identify specific prior art in this field.
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- Unanswered Questions
- How does this semiconductor structure compare to traditional DRAM designs?
The article does not provide a direct comparison between this new 2T0C DRAM structure and traditional DRAM designs in terms of performance, efficiency, or cost-effectiveness.
- What are the specific manufacturing processes involved in creating this semiconductor structure?
The article does not delve into the detailed manufacturing processes or techniques required to produce this new semiconductor structure for 2T0C DRAM.
Original Abstract Submitted
The present disclosure provides a semiconductor structure including: a channel on a semiconductor substrate for a first transistor; first bit lines are in contact with the first doped region arranged along the first direction; first word lines surround the channel region; the gate conductive layer and the second doped region, the channel layer arranged around the outer side of the gate conductive layer; the first semiconductor doped layer and the second semiconductor doped layer arranged on the outer side of the channel layer, so the channel layer and the gate conductive layer constitute the second transistor. The second bit line is in contact with either the first semiconductor doped layer or the second semiconductor doped layer; the second word line is in contact with the other one of the first semiconductor or the second semiconductor doped layer. The structure forms a new 2T0C DRAM structure.
