18159631. SPACER FORMATION METHOD FOR MULTI-GATE DEVICE AND STRUCTURES THEREOF simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)
Contents
- 1 SPACER FORMATION METHOD FOR MULTI-GATE DEVICE AND STRUCTURES THEREOF
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 SPACER FORMATION METHOD FOR MULTI-GATE DEVICE AND STRUCTURES THEREOF - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
SPACER FORMATION METHOD FOR MULTI-GATE DEVICE AND STRUCTURES THEREOF
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Wei-Yang Lee of Taipei City (TW)
Chia-Pin Lin of Hsinchu County (TW)
SPACER FORMATION METHOD FOR MULTI-GATE DEVICE AND STRUCTURES THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 18159631 titled 'SPACER FORMATION METHOD FOR MULTI-GATE DEVICE AND STRUCTURES THEREOF
Simplified Explanation
The method described in the abstract involves depositing spacer layers with different etch rates over a semiconductor fin structure to create a funnel-shaped trench in the source/drain region. Inner spacers are then formed along the sidewall surface of the trench.
- The method involves providing a fin structure with multiple semiconductor channel layers.
- A first spacer layer with a certain etch rate is deposited over the gate and fin.
- A second spacer layer with a lower etch rate is then deposited over the first spacer layer.
- The semiconductor channel layers are removed to form a trench with a funnel shape.
- Inner spacers are formed along the sidewall surface of the trench.
Potential Applications
This technology could be applied in the manufacturing of advanced semiconductor devices, such as transistors, to improve performance and efficiency.
Problems Solved
This method helps in creating precise and controlled trench structures in semiconductor devices, which can enhance device performance and reliability.
Benefits
- Improved device performance - Enhanced efficiency - Controlled trench formation
Potential Commercial Applications
The technology could be utilized in the production of high-performance electronic devices for various industries, including consumer electronics, telecommunications, and automotive.
Possible Prior Art
Prior art in semiconductor device fabrication may include methods for forming spacers and trenches in device structures to improve performance and functionality.
Unanswered Questions
How does this method compare to existing techniques for trench formation in semiconductor devices?
This method offers a unique approach to creating funnel-shaped trenches with inner spacers, but it would be beneficial to compare its effectiveness and efficiency against other established techniques.
What impact could this technology have on the overall cost of semiconductor device manufacturing?
Understanding the potential cost implications of implementing this method in semiconductor fabrication processes could provide valuable insights into its commercial viability and scalability.
Original Abstract Submitted
A method includes providing a fin extending from a substrate, the fin including a plurality of semiconductor channel layers, and where a gate is disposed over the fin. A first spacer layer is deposited over the gate and over the fin in a source/drain region. The first spacer layer has a first etch rate. A second spacer layer is deposited over the first spacer layer. The second spacer layer has a second etch rate less than the first etch rate. The plurality of semiconductor channel layers are removed from the source/drain region to form a trench having a funnel shape. After forming the trench, inner spacers are formed along a sidewall surface of the trench. In various embodiments, lateral sidewall surfaces of each semiconductor channel layer of the plurality of semiconductor channel layers is substantially free of an inner spacer material.
