18159625. MULTI-GATE DEVICE INNER SPACER AND METHODS THEREOF simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

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MULTI-GATE DEVICE INNER SPACER AND METHODS THEREOF

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Chih-Ching Wang of Kinmen County (TW)

Wei-Yang Lee of Taipei City (TW)

Bo-Yu Lai of Taipei City (TW)

Chung-I Yang of Hsinchu City (TW)

Sung-En Lin of Hsinchu County (TW)

MULTI-GATE DEVICE INNER SPACER AND METHODS THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18159625 titled 'MULTI-GATE DEVICE INNER SPACER AND METHODS THEREOF

Simplified Explanation

The abstract describes a method for modulating an inner spacer profile by using a fin with an epitaxial layer stack, including semiconductor channel layers and dummy layers. The process involves removing dummy layers, depositing a dielectric layer to fill gaps, etching the dielectric layer to create V-shaped recesses, and forming a V-shaped inner spacer within the recesses.

  • The method involves providing a fin with an epitaxial layer stack.
  • The process includes removing dummy layers to create gaps between semiconductor channel layers.
  • A dielectric layer is deposited to fill the gaps.
  • The dielectric layer is etched to form V-shaped recesses.
  • A V-shaped inner spacer is formed within the recesses.

Potential Applications

This technology could be applied in semiconductor manufacturing processes to improve device performance and efficiency.

Problems Solved

This technology helps in modulating the inner spacer profile, which can enhance the functionality and characteristics of semiconductor devices.

Benefits

The method provides a way to precisely control the spacer profile, leading to improved device performance and reliability.

Potential Commercial Applications

This technology could be utilized in the production of advanced semiconductor devices for various industries, including electronics and telecommunications.

Possible Prior Art

There may be prior art related to methods for modulating spacer profiles in semiconductor devices, but specific examples are not provided in this abstract.

Unanswered Questions

1. What specific semiconductor devices could benefit the most from this method of modulating the inner spacer profile? 2. Are there any limitations or challenges associated with implementing this technology on a large scale in semiconductor manufacturing processes?


Original Abstract Submitted

Methods and structures for modulating an inner spacer profile include providing a fin having an epitaxial layer stack including a plurality of semiconductor channel layers interposed by a plurality of dummy layers. In some embodiments, the method further includes removing the plurality of dummy layers to form a first gap between adjacent semiconductor channel layers of the plurality of semiconductor channel layers. Thereafter, in some examples, the method includes conformally depositing a dielectric layer to substantially fill the first gap between the adjacent semiconductor channel layers. In some cases, the method further includes etching exposed lateral surfaces of the dielectric layer to form an etched-back dielectric layer that defines substantially V-shaped recesses. In some embodiments, the method further includes forming a substantially V-shaped inner spacer within the substantially V-shaped recesses.