18159200. SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Sora You of Suwon-si (KR)

Kyoungwoo Lee of Suwon-si (KR)

Sungmoon Lee of Suwon-si (KR)

Seungmin Cha of Suwon-si (KR)

Hagju Cho of Suwon-si (KR)

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18159200 titled 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Simplified Explanation

The abstract of the patent application describes a semiconductor device that includes parallel active regions on a substrate, gate structures intersecting the active regions, and source/drain regions on at least one side of the gate structures and the active regions. The device also includes a gate separation pattern with a vertical conductive structure, and contact plugs that are electrically connected to the source/drain regions and the vertical conductive structure.

  • The semiconductor device has parallel active regions and gate structures intersecting them.
  • The gate structures include opposing first and second gate structures.
  • Source/drain regions are present on at least one side of the gate structures and the active regions.
  • A gate separation pattern separates the first and second gate structures.
  • A vertical conductive structure is present in the gate separation pattern.
  • Contact plugs are electrically connected to the source/drain regions and the vertical conductive structure.
  • The contact plugs include a first contact plug connected to the first source/drain region and the vertical conductive structure, and a second contact plug connected to the second source/drain region and spaced apart from the vertical conductive structure.
  • A contact separation pattern separates the first and second contact plugs, with a portion of it contacting the upper surface of the vertical conductive structure.

Potential applications of this technology:

  • This semiconductor device can be used in various electronic devices such as smartphones, tablets, and computers.
  • It can be utilized in integrated circuits for improved performance and functionality.

Problems solved by this technology:

  • The parallel active regions and gate structures allow for efficient control of the flow of current in the semiconductor device.
  • The gate separation pattern with the vertical conductive structure helps in reducing leakage current and improving device performance.
  • The contact plugs provide reliable electrical connections between the source/drain regions and the vertical conductive structure.

Benefits of this technology:

  • Improved performance and functionality of electronic devices.
  • Enhanced control of current flow in the semiconductor device.
  • Reduced leakage current and improved device efficiency.
  • Reliable electrical connections between different components of the device.


Original Abstract Submitted

A semiconductor device includes parallel active regions on a substrate and extending in a first horizontal direction; gate structures intersecting the active regions, extending in a second horizontal direction, and including first and second gate structures opposing each other in the second horizontal direction; source/drain regions including first and second source/drain regions, on at least one side of the gate structures and on the active regions; a gate separation pattern between the first and second gate structures; a vertical conductive structure in the gate separation pattern; contact plugs including a first contact plug electrically connected to the first source/drain region and the vertical conductive structure, and a second contact plug electrically connected to the second source/drain region and spaced apart from the vertical conductive structure; and a contact separation pattern separating the first and second contact plugs, having a portion contacting an upper surface of the vertical conductive structure.