18157478. VERTICAL TYPE TRANSISTOR, INVERTER INCLUDING THE SAME, AND VERTICAL TYPE SEMICONDUCTOR DEVICE INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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VERTICAL TYPE TRANSISTOR, INVERTER INCLUDING THE SAME, AND VERTICAL TYPE SEMICONDUCTOR DEVICE INCLUDING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Minhyun Lee of Suwon-si (KR)

Minsu Seol of Suwon-si (KR)

Yeonchoo Cho of Seongnam-si (KR)

Hyeonjin Shin of Suwon-si (KR)

VERTICAL TYPE TRANSISTOR, INVERTER INCLUDING THE SAME, AND VERTICAL TYPE SEMICONDUCTOR DEVICE INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18157478 titled 'VERTICAL TYPE TRANSISTOR, INVERTER INCLUDING THE SAME, AND VERTICAL TYPE SEMICONDUCTOR DEVICE INCLUDING THE SAME

Simplified Explanation

The abstract describes a patent application for a vertical type transistor that includes various layers and a channel layer made of a 2D semiconductor.

  • The transistor has a substrate, first and second source/drain electrode layers, and a first gate electrode layer.
  • A first gate insulating film passes through the first gate electrode layer.
  • A hole passes through the second source/drain electrode layer, the first gate insulating film, and the first source/drain electrode layer.
  • A first channel layer is provided on the lateral side of the hole and may be made of a 2D semiconductor.

Potential applications of this technology:

  • Integrated circuits
  • Electronic devices
  • Transistors in various industries

Problems solved by this technology:

  • Improved performance and efficiency of transistors
  • Enhanced integration of components in integrated circuits
  • Better control of electrical current flow

Benefits of this technology:

  • Higher performance and efficiency in electronic devices
  • Increased functionality and miniaturization of integrated circuits
  • Improved reliability and stability of transistors


Original Abstract Submitted

A vertical type transistor includes: a substrate; a first source/drain electrode layer provided on the substrate; a second source/drain electrode layer provided above the first source/drain electrode layer; a first gate electrode layer provided between the first and second source/drain electrode layers; a first gate insulating film passing through the first gate electrode layer; a hole passing through the second source/drain electrode layer, the first gate insulating film, and the first source/drain electrode layer; and a first channel layer provided on a lateral side of the hole, wherein the first channel layer may include a 2D semiconductor.