18157395. STRUCTURE OF ISOLATION FEATURE OF SEMICONDUCTOR DEVICE STRUCTURE simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

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STRUCTURE OF ISOLATION FEATURE OF SEMICONDUCTOR DEVICE STRUCTURE

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Kuo-Cheng Ching of Zhubei City (TW)

Shi-Ning Ju of Hsinchu City (TW)

Kuan-Ting Pan of Taipei City (TW)

Kuan-Lun Cheng of Hsin-Chu (TW)

Chih-Hao Wang of Baoshan Township (TW)

STRUCTURE OF ISOLATION FEATURE OF SEMICONDUCTOR DEVICE STRUCTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18157395 titled 'STRUCTURE OF ISOLATION FEATURE OF SEMICONDUCTOR DEVICE STRUCTURE

Simplified Explanation

The patent application describes a semiconductor device structure that includes a fin structure over a semiconductor substrate and a dummy gate stack formed over the fin structure. The structure also includes source/drain structures adjacent to the sidewalls of the dummy gate stack and an isolation feature below the dummy gate stack.

  • The semiconductor device structure includes a fin structure and a dummy gate stack.
  • Source/drain structures are located adjacent to the sidewalls of the dummy gate stack.
  • An isolation feature is formed below the dummy gate stack.
  • The isolation feature has overlapping sidewalls and is in direct contact with the bottom of the dummy gate stack.

Potential applications of this technology:

  • This semiconductor device structure can be used in various electronic devices such as smartphones, tablets, and computers.
  • It can be utilized in the manufacturing of integrated circuits and microprocessors.

Problems solved by this technology:

  • The structure provides improved isolation between the dummy gate stack and the source/drain structures, reducing leakage current and improving device performance.
  • The overlapping sidewalls of the isolation feature enhance the effectiveness of the isolation, preventing unwanted electrical interactions.

Benefits of this technology:

  • Improved device performance due to reduced leakage current.
  • Enhanced isolation between different components, leading to better overall device functionality.
  • Increased reliability and lifespan of the semiconductor device structure.


Original Abstract Submitted

A semiconductor device structure includes a fin structure over a semiconductor substrate and a dummy gate stack formed over the fin structure and having a first sidewall and an opposite second sidewall. The semiconductor device structure also includes a first and second source or drain (S/D) structures in the fin structure and respectively adjacent to the first and second sidewalls of the dummy gate stack. The semiconductor device structure further includes an isolation feature formed in the fin structure below the dummy gate stack and having a third sidewall and an opposite fourth sidewall. A first end of the third sidewall overlaps the first end of the fourth sidewall. A second end of the third sidewall is in direct contact with a bottom of the dummy gate stack. A second end of the fourth sidewall is separated from the bottom of the dummy gate stack.