18156893. NON-VOLATILE MEMORY DEVICE, CONTROLLER FOR CONTROLLING THE SAME, STORAGE DEVICE HAVING THE SAME, AND READING METHOD THEREOF simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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NON-VOLATILE MEMORY DEVICE, CONTROLLER FOR CONTROLLING THE SAME, STORAGE DEVICE HAVING THE SAME, AND READING METHOD THEREOF

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Dongmin Shin of Seoul (KR)

Jinyoung Kim of Seoul (KR)

Sehwan Park of Suwon-si (KR)

NON-VOLATILE MEMORY DEVICE, CONTROLLER FOR CONTROLLING THE SAME, STORAGE DEVICE HAVING THE SAME, AND READING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18156893 titled 'NON-VOLATILE MEMORY DEVICE, CONTROLLER FOR CONTROLLING THE SAME, STORAGE DEVICE HAVING THE SAME, AND READING METHOD THEREOF

Simplified Explanation

The abstract describes a controller for non-volatile memory devices that includes an error correction circuit and a non-volatile memory interface circuit. The non-volatile memory interface circuit receives side information from the memory device, predicts a distribution of memory cells based on this information, and selects an error correction decoding level accordingly.

  • The controller includes a non-volatile memory interface circuit connected to non-volatile memory devices.
  • An error correction circuit performs error correction on received codewords.
  • The error correction decoding level is selected based on predicted distribution of memory cells.
  • The non-volatile memory interface circuit receives side information from the memory devices.
  • The predicted distribution of memory cells helps in selecting the appropriate error correction decoding level.

Potential Applications

  • This technology can be applied in various storage devices such as solid-state drives (SSDs) and flash memory cards.
  • It can be used in data centers and servers to enhance the reliability and performance of storage systems.

Problems Solved

  • Non-volatile memory devices can experience errors during data storage and retrieval.
  • Predicting the distribution of memory cells helps in selecting the most effective error correction decoding level.
  • This technology addresses the challenge of optimizing error correction for different memory cell distributions.

Benefits

  • Improved error correction capabilities enhance the reliability and integrity of stored data.
  • Selecting the appropriate error correction decoding level based on predicted memory cell distribution improves overall performance.
  • The technology enables efficient utilization of non-volatile memory devices by adapting error correction to specific conditions.


Original Abstract Submitted

A controller including a non-volatile memory interface circuit connected to at least one non-volatile memory device and configured to control the at least one non-volatile memory device; an error correction circuit configured to perform an error correction operation on a codeword received from the non-volatile memory interface circuit according to an error correction decoding level from among a plurality of error correction decoding levels, wherein the non-volatile memory interface circuit is further configured to: receive side information from the at least one non-volatile memory device; predict a distribution of memory cells based on the side information; and select the error correction decoding level from among the plurality of error correction decoding levels according to the predicted distribution.