18156848. 3DIC STRUCTURE AND METHODS OF FORMING simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

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3DIC STRUCTURE AND METHODS OF FORMING

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Kuo-Ming Wu of Zhubei City (TW)

Yung-Lung Lin of Taichung City (TW)

Zhi-Yang Wang of Taichung City (TW)

Sheng-Chau Chen of Tainan City (TW)

Cheng-Hsien Chou of Tainan City (TW)

3DIC STRUCTURE AND METHODS OF FORMING - A simplified explanation of the abstract

This abstract first appeared for US patent application 18156848 titled '3DIC STRUCTURE AND METHODS OF FORMING

Simplified Explanation

The abstract describes a structure and method for forming a connection pad in a semiconductor device. The structure includes multiple layers of dielectric material and substrates, with connection pads and dummy pads positioned in specific ways to prevent contact between them.

  • The structure includes a first dielectric layer on a first substrate.
  • A first connection pad is located on the top surface of the first dielectric layer and is connected to a first redistribution line.
  • A first dummy pad is also located on the top surface of the first dielectric layer and contacts the first redistribution line.
  • A second dielectric layer is present on a second substrate.
  • A second connection pad and a second dummy pad are located on the top surface of the second dielectric layer.
  • The second connection pad is bonded to the first connection pad.
  • The first dummy pad and the second dummy pad are positioned in a way that they do not come into contact with each other.

Potential applications of this technology:

  • Semiconductor devices manufacturing
  • Integrated circuits production
  • Electronics industry

Problems solved by this technology:

  • Prevents contact between connection pads and dummy pads in a semiconductor device.
  • Ensures proper functioning and reliability of the device.

Benefits of this technology:

  • Improved performance and reliability of semiconductor devices.
  • Enhanced manufacturing process efficiency.
  • Reduction in potential short circuits or other electrical issues.


Original Abstract Submitted

A structure and a method of forming are provided. The structure includes a first dielectric layer overlying a first substrate. A first connection pad is disposed in a top surface of the first dielectric layer and contacts a first redistribution line. A first dummy pad is disposed in the top surface of the first dielectric layer, the first dummy pad contacting the first redistribution line. A second dielectric layer overlies a second substrate. A second connection pad and a second dummy pad are disposed in the top surface of the second dielectric layer, the second connection pad bonded to the first connection pad, and the first dummy pad positioned in a manner that is offset from the second dummy pad so that the first dummy pad and the second dummy pad do not contact each other.

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