18156734. MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE AND METHOD simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)
MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE AND METHOD
Organization Name
Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor(s)
Sai-Hooi Yeong of Hsinchu (TW)
Chenchen Jacob Wang of Hsinchu (TW)
MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE AND METHOD - A simplified explanation of the abstract
This abstract first appeared for US patent application 18156734 titled 'MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE AND METHOD
Simplified Explanation
The abstract describes a memory device that includes a bit line, a word line, a memory cell, select bit lines, and a controller. The memory cell consists of a first transistor, data storage elements, and second transistors corresponding to the data storage elements. The first transistor is connected to the word line and has a first source/drain and a second source/drain. Each select bit line is connected to a gate of a corresponding second transistor. Each data storage element and its corresponding second transistor are connected in series between the first source/drain of the first transistor and the bit line. The controller activates the first transistor and a selected second transistor, and while they are activated, applies different voltages to the bit line to perform various operations on the data storage element connected to the selected second transistor.
- The memory device includes a bit line, word line, memory cell, select bit lines, and a controller.
- The memory cell consists of a first transistor, data storage elements, and second transistors.
- The first transistor is connected to the word line and has a first source/drain and a second source/drain.
- Each select bit line is connected to a gate of a corresponding second transistor.
- Each data storage element and its corresponding second transistor are connected in series between the first source/drain of the first transistor and the bit line.
- The controller activates the first transistor and a selected second transistor.
- While the first transistor and selected second transistor are activated, different voltages are applied to the bit line to perform operations on the data storage element connected to the selected second transistor.
Potential Applications
- Memory devices for computers, smartphones, and other electronic devices.
- High-speed data storage and retrieval systems.
- Solid-state drives (SSDs) and flash memory devices.
Problems Solved
- Efficient and reliable data storage and retrieval.
- Improved performance and speed of memory devices.
- Enhanced durability and lifespan of memory cells.
Benefits
- Faster data access and processing.
- Increased storage capacity.
- Lower power consumption.
- Improved reliability and durability of memory devices.
Original Abstract Submitted
A memory device includes a bit line, a word line, a memory cell, select bit lines, and a controller. The memory cell includes a first transistor, data storage elements, and second transistors corresponding to the data storage elements. The first transistor includes a gate electrically coupled to the word line, a first source/drain, and a second source/drain. Each of the select bit lines is electrically coupled to a gate of a corresponding second transistor. Each data storage element and the corresponding second transistor are electrically coupled in series between the first source/drain of the first transistor and the bit line. The controller turns ON the first transistor and a selected second transistor, and, while the first transistor and the selected second transistor are turned ON, applies different voltages to the bit line to perform corresponding different operations on the data storage element coupled to the selected second transistor.
