18156711. METHOD OF FORMING SEMICONDUCTOR DEVICE INCLUDING DEEP VIAS simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

METHOD OF FORMING SEMICONDUCTOR DEVICE INCLUDING DEEP VIAS

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Ta-Pen Guo of Hsinchu (TW)

Chien-Ying Chen of Hsinchu (TW)

Li-Chun Tien of Hsinchu (TW)

Lee-Chung Lu of Hsinchu (TW)

METHOD OF FORMING SEMICONDUCTOR DEVICE INCLUDING DEEP VIAS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18156711 titled 'METHOD OF FORMING SEMICONDUCTOR DEVICE INCLUDING DEEP VIAS

Simplified Explanation

The patent application describes a method of manufacturing a semiconductor device. Here is a simplified explanation of the abstract:

• The method involves creating via structures in a first via layer over a transistor layer.
• The via structures are formed in a first deep via arrangement, with a first via structure being included in it.
• Conductive segments are then formed in a first metallization layer over the first via layer.
• The conductive segments include M_1st routing segments, most of which have long axes that meet or exceed a minimum value for routing segments in the first metallization layer.
• Additionally, an M_1st interconnection segment is formed, which has a long axis that is less than the minimum value.
• The M_1st interconnection segment is included in the first deep via arrangement.

Potential applications of this technology:

• Semiconductor manufacturing industry
• Electronics manufacturing industry

Problems solved by this technology:

• Efficient formation of via structures and conductive segments in a semiconductor device
• Ensuring proper routing of conductive segments in the metallization layer

Benefits of this technology:

• Improved manufacturing process for semiconductor devices
• Enhanced performance and reliability of the semiconductor device
• Optimal routing of conductive segments for efficient signal transmission

Original Abstract Submitted

A method of manufacturing a semiconductor device includes forming via structures in a first via layer over a transistor layer, the forming the via structures in the first via layer including forming a first via structure in the first via layer, the first via structure being included in a first deep via arrangement; forming conductive segments in a first metallization layer over the first via layer, the forming the conductive segments in the first metallization layer including forming M_1st routing segments at least a majority of which, relative to a first direction, have corresponding long axes with lengths which at least equal if not exceed a first permissible minimum value for routing segments in the first metallization layer; and forming an M_1st interconnection segment having a long axis which is less than the first permissible minimum value, the M_1st interconnection segment being included in the first deep via arrangement.