18156322. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME simplified abstract (Changxin Memory Technologies, Inc.)
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME
Organization Name
Changxin Memory Technologies, Inc.
Inventor(s)
YOUMING Liu of Hefei City (CN)
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18156322 titled 'SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME
Simplified Explanation
The patent application describes a method for forming a semiconductor structure with double heterostructures arrayed in two directions on a substrate. A double gate structure is formed on the sidewalls of each double heterostructure.
- The method involves providing a substrate with double heterostructures arranged in two directions.
- Each double heterostructure consists of three semiconductor layers with different forbidden band gaps.
- The double gate structure is formed on the sidewalls of each double heterostructure along one of the directions.
- The first direction is perpendicular to the second direction, and both are parallel to the substrate's plane.
Potential Applications
- Semiconductor devices
- Optoelectronic devices
- Solar cells
Problems Solved
- Improved control over the electronic properties of the semiconductor structure.
- Enhanced performance and efficiency of semiconductor devices.
- Better integration of double gate structures in semiconductor devices.
Benefits
- Increased flexibility in designing and fabricating semiconductor structures.
- Improved performance and functionality of semiconductor devices.
- Enhanced energy conversion efficiency in optoelectronic and solar cell applications.
Original Abstract Submitted
A method for forming a semiconductor structure includes the following operations. A substrate is provided. The substrate includes double heterostructures arrayed along a first direction and a second direction. Each of the double heterostructures includes a first semiconductor layer, a second semiconductor layer and another first semiconductor layer sequentially arranged along the first direction. A forbidden band gap of the first semiconductor layer is different from a forbidden band gap of the second semiconductor layer. The first direction is perpendicular to the second direction, and both the first direction and the second direction are parallel to a direction of a plane where the substrate is located. A double gate structure is formed on sidewalls of each of the double heterostructures along the first direction.
