18155887. SILICIDE-SANDWICHED SOURCE/DRAIN REGION AND METHOD OF FABRICATING SAME simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

SILICIDE-SANDWICHED SOURCE/DRAIN REGION AND METHOD OF FABRICATING SAME

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Chung-Hui Chen of Hsinchu (TW)

Tung-Tsun Chen of Hsinchu (TW)

Jui-Cheng Huang of Hsinchu (TW)

SILICIDE-SANDWICHED SOURCE/DRAIN REGION AND METHOD OF FABRICATING SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18155887 titled 'SILICIDE-SANDWICHED SOURCE/DRAIN REGION AND METHOD OF FABRICATING SAME

Simplified Explanation

The patent application describes a method of manufacturing a semiconductor structure. Here are the key points:

• The method involves forming an active region with a doped first portion.
• A first silicide layer is formed over and electrically connected to the first portion of the active region.
• A second silicide layer is formed under and electrically connected to the first portion of the active region.
• A first metal-to-drain/source (MD) contact structure is formed over and electrically connected to the first silicide layer.
• A first via-to-MD (VD) structure is formed over and electrically connected to the MD contact structure.
• A buried via-to-source/drain (BVD) structure is formed under and electrically connected to the second silicide layer.

Potential applications of this technology:

• Manufacturing of semiconductor devices such as transistors and integrated circuits.
• Improving the electrical performance and reliability of semiconductor structures.

Problems solved by this technology:

• Enhancing the electrical coupling between different layers and portions of the semiconductor structure.
• Increasing the efficiency and functionality of semiconductor devices.

Benefits of this technology:

• Improved electrical connectivity and performance of the semiconductor structure.
• Enhanced reliability and durability of semiconductor devices.
• Potential for increased efficiency and functionality in electronic devices.

Original Abstract Submitted

A method of manufacturing a semiconductor structure includes forming an active region having a first portion which is doped. The method further includes forming a first silicide layer over and electrically coupled to the first portion of the active region. The method further includes forming a second silicide layer under and electrically coupled to the first portion of the active region. The method further includes forming a first metal-to-drain/source (MD) contact structure over and electrically coupled to the first silicide layer. The method further includes forming a first via-to-MD (VD) structure over and electrically coupled to the MD contact structure. The method further includes forming a buried via-to-source/drain (BVD) structure under and electrically coupled to the second silicide layer.