18155491. IMAGE SENSOR PACKAGING AND METHODS FOR FORMING THE SAME simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

IMAGE SENSOR PACKAGING AND METHODS FOR FORMING THE SAME

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Hao-Lin Yang of Kaohsiung City (TW)

Tzu-Jui Wang of Kaohsiung County (TW)

Wei-Cheng Hsu of Kaohsiung City (TW)

Cheng-Jong Wang of Hsin-Chu (TW)

Dun-Nian Yuang of Taipei City (TW)

Kuan-Chieh Huang of Hsinchu City (TW)

IMAGE SENSOR PACKAGING AND METHODS FOR FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18155491 titled 'IMAGE SENSOR PACKAGING AND METHODS FOR FORMING THE SAME

Simplified Explanation

The device structure described in the abstract includes multiple dies with interconnect structures bonded together, forming a complex electronic system. Here are some key points to explain the patent/innovation:

• The device structure consists of three dies: the first die with a substrate and interconnect structure, the second die with a substrate and interconnect structure, and the third die with photodiodes and transistors.
• The first interconnect structure is bonded to the second substrate using multiple bonding layers, while the second interconnect structure is bonded to the third interconnect structure using additional bonding layers.
• The second die includes multiple transistors interconnected in a specific configuration, with each transistor playing a distinct role in the overall functionality of the device.

Potential Applications

The technology described in this patent application could be applied in the following areas:

• Advanced electronic devices
• Sensor systems
• Integrated circuits

Problems Solved

This technology helps address the following issues:

• Complex interconnectivity in electronic systems
• Efficient bonding of multiple dies
• Integration of different functionalities in a compact space

Benefits

The device structure offers the following benefits:

• Improved performance and functionality
• Enhanced integration capabilities
• Compact design for space-saving applications

Potential Commercial Applications

The technology has potential commercial applications in:

• Consumer electronics
• Automotive industry
• Medical devices

Possible Prior Art

One possible prior art for this technology could be the integration of multiple dies in electronic systems using bonding layers and complex interconnect structures.

Unanswered Questions

1. How does the specific configuration of transistors in the second die contribute to the overall functionality of the device? 2. What are the specific materials used for the bonding layers in this device structure, and how do they impact the performance and reliability of the system?

Original Abstract Submitted

A device structure according to the present disclosure may include a first die having a first substrate and a first interconnect structure, a second die having a second substrate and a second interconnect structure, and a third die having a third interconnect structure and a third substrate. The first interconnect structure is bonded to the second substrate via a first plurality of bonding layers. The second interconnect structure is bonded to the third interconnect structure via a second plurality of bonding layers. The third substrate includes a plurality of photodiodes and a first transistor. The second die includes a second transistor having a source connected to a drain of the first transistor, a third transistor having a gate connected to drain of the first transistor and the source of the second transistor, and a fourth transistor having a drain connected to the source of the third transistor.