Fan-Out Stacked Package and Methods of Making the Same

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Fan-Out Stacked Package and Methods of Making the Same - A simplified explanation of the abstract

This abstract first appeared for US patent application 18152539 titled 'Fan-Out Stacked Package and Methods of Making the Same

Simplified Explanation

The abstract describes a package with multiple devices and redistribution structures, encapsulated in multiple layers of encapsulant to provide protection and connectivity without the need for through substrate vias.

Package includes multiple devices and redistribution structures
Encapsulant layers provide protection and connectivity
No through substrate vias are needed

Potential Applications

The technology described in this patent application could be applied in the following areas:

Semiconductor packaging
Microelectronics
Integrated circuits

Problems Solved

The technology addresses the following issues:

Providing protection for multiple devices in a package
Ensuring connectivity between devices without through substrate vias

Benefits

The benefits of this technology include:

Improved reliability and durability of packages
Simplified packaging process
Enhanced electrical performance

Potential Commercial Applications

The technology could be utilized in various commercial applications such as:

Consumer electronics
Automotive electronics
Aerospace industry

Possible Prior Art

One possible prior art for this technology could be the use of through substrate vias in semiconductor packaging to provide connectivity between devices. However, the current technology eliminates the need for such vias, simplifying the packaging process and potentially improving performance.

Unanswered Questions

How does this technology compare to traditional packaging methods in terms of cost and efficiency?

The article does not provide information on the cost implications or efficiency gains of this technology compared to traditional packaging methods.

What are the potential limitations or challenges in implementing this technology on a larger scale?

The article does not address any potential limitations or challenges that may arise when implementing this technology on a larger scale.

Original Abstract Submitted

In an embodiment, a package includes a first device and a second device attached to a first redistribution structure, wherein the second device includes a second redistribution structure, a first die disposed over the second redistribution structure, a first encapsulant extending along sidewalls of the first die, a first via extending through the first encapsulant, a third redistribution structure disposed over the first encapsulant and including a first metallization pattern connecting to the first via, a second die disposed over the third redistribution structure, and a second encapsulant extending along sidewalls of the second die, the first die and the second die being free of through substrate vias. The package also includes a third encapsulant disposed over the first redistribution structure and surrounding sidewalls of the first device and the second device, wherein top surfaces of the second encapsulant and the third encapsulant are level with each other.

18152539. Fan-Out Stacked Package and Methods of Making the Same simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

Contents

Fan-Out Stacked Package and Methods of Making the Same

Organization Name

Inventor(s)