18151624. Integrated Circuits With Contacting Gate Structures simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

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Integrated Circuits With Contacting Gate Structures

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Jhon Jhy Liaw of Hsinchu County (TW)

Integrated Circuits With Contacting Gate Structures - A simplified explanation of the abstract

This abstract first appeared for US patent application 18151624 titled 'Integrated Circuits With Contacting Gate Structures

Simplified Explanation

The abstract describes an integrated circuit with a contacting gate structure and a method for forming the integrated circuit. The integrated circuit device includes a memory cell with multiple fins and a gate that extends over two of these fins. The gate has a gate electrode that physically contacts one fin and a gate dielectric between the gate electrode and the other fin. The first fin also has a source/drain region and a doped region that physically contacts the gate electrode.

  • The integrated circuit device includes a memory cell with multiple fins and a gate structure.
  • The gate structure extends over two fins, with a gate electrode physically contacting one fin and a gate dielectric between the gate electrode and the other fin.
  • The first fin of the memory cell has a source/drain region and a doped region that physically contacts the gate electrode.

Potential Applications

  • This technology can be applied in the field of integrated circuits and memory devices.
  • It can be used in various electronic devices such as smartphones, computers, and tablets.
  • The contacting gate structure can improve the performance and efficiency of memory cells.

Problems Solved

  • The integrated circuit with a contacting gate structure solves the problem of limited space in memory cells.
  • It addresses the challenge of improving the performance and efficiency of memory devices.
  • The method for forming the integrated circuit provides a solution for integrating the gate structure with multiple fins.

Benefits

  • The contacting gate structure allows for better control and operation of the memory cell.
  • It improves the overall performance and efficiency of the integrated circuit device.
  • The method for forming the integrated circuit provides a reliable and efficient process for manufacturing the device.


Original Abstract Submitted

Examples of an integrated circuit with a contacting gate structure and a method for forming the integrated circuit are provided herein. In some examples, an integrated circuit device includes a memory cell that includes a plurality of fins and a gate extending over a first fin of the plurality of fins and a second fin of the plurality of fins. The gate includes a gate electrode that physically contacts the first fin and a gate dielectric disposed between the gate electrode and the second fin. In some such examples, the first fin includes a source/drain region and a doped region that physically contacts the gate electrode.

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