18150809. SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.)

SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor(s)

CHAO-HSUAN Chen of HSIN-CHU (TW)

WEI CHEN Hung of HSINCHU CITY (TW)

LI-WEI Yin of HSINCHU CITY (TW)

YU-HSIEN Lin of KAOHSIUNG CITY (TW)

YIH-ANN Lin of HSINCHU (TW)

RYAN CHIA-JEN Chen of HSINCHU (TW)

SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18150809 titled 'SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME

Simplified Explanation

The abstract describes a method for manufacturing a semiconductor structure involving the formation of a sacrificial gate layer, source/drain structure, and work function layer.

• Substrate with fin structure received
• Sacrificial gate layer formed over fin structure
• Source/drain structure formed adjacent to sacrificial gate layer
• Sacrificial gate layer removed, leaving a recess
• Work function layer formed in the recess with an overhang portion
• Glue layer formed over the work function layer

Potential Applications

The technology described in this patent application could be applied in the manufacturing of advanced semiconductor devices, such as transistors, integrated circuits, and other electronic components.

Problems Solved

This technology solves the problem of optimizing the performance and efficiency of semiconductor structures by providing a method for precise formation of key components like the work function layer.

Benefits

The benefits of this technology include improved control over the semiconductor structure's properties, enhanced functionality, and potentially increased device performance.

Potential Commercial Applications

The technology could have commercial applications in the semiconductor industry for the production of high-performance electronic devices, leading to advancements in areas such as computing, telecommunications, and consumer electronics.

Possible Prior Art

One possible prior art in this field could be the use of sacrificial gate layers in semiconductor manufacturing processes to create recesses for the formation of work function layers. Additionally, techniques for optimizing the thickness and composition of work function layers may have been previously explored.

How does this method compare to existing techniques for forming work function layers in semiconductor structures?

This article does not provide a direct comparison with existing techniques for forming work function layers in semiconductor structures. It would be beneficial to understand the specific advantages and limitations of this method compared to traditional approaches.

What are the potential challenges or limitations of implementing this manufacturing method on a larger scale?

The article does not address the scalability or potential challenges of implementing this manufacturing method on a larger scale. It would be important to consider factors such as production costs, equipment requirements, and process reliability when scaling up this technology for commercial production.

Original Abstract Submitted

A method for manufacturing a semiconductor structure is provided. A substrate including a fin structure is received, provided or formed. A sacrificial gate layer is formed over the fin structure and a source/drain structure is formed adjacent to the sacrificial gate layer, wherein the sacrificial gate layer is surrounded by a dielectric structure. The sacrificial gate layer is removed, wherein a recess is defined by the dielectric structure. A work function layer is formed in the recess, wherein the work function layer includes an overhang portion at an opening of the recess. A thickness of the work function layer is reduced. A glue layer is formed over the work function layer. A semiconductor structure thereof is also provided.