18150524. Transistor Source/Drain Regions and Methods of Forming the Same simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

Transistor Source/Drain Regions and Methods of Forming the Same

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Tsung-Han Chuang of Tainan City (TW)

Zhi-Chang Lin of Zhubei City (TW)

Shih-Cheng Chen of New Taipei City (TW)

Jung-Hung Chang of Yuanlin City (TW)

Chien Ning Yao of Hsinchu (TW)

Kai-Lin Chuang of Chia-Yi City (TW)

Kuo-Cheng Chiang of Zhubei City (TW)

Chih-Hao Wang of Baoshan Township (TW)

Transistor Source/Drain Regions and Methods of Forming the Same - A simplified explanation of the abstract

This abstract first appeared for US patent application 18150524 titled 'Transistor Source/Drain Regions and Methods of Forming the Same

Simplified Explanation

The abstract describes a device that includes nanostructures, a semiconductor layer, a spacer, source/drain regions, and a gate structure. Here is a simplified explanation of the abstract:

• The device consists of nanostructures, which are very small structures.
• There is a semiconductor layer that is not doped (undoped) and it contacts a dummy region of the nanostructures.
• A spacer is present on top of the undoped semiconductor layer.
• Source/drain regions are located on top of the spacer and they make contact with a channel region of the nanostructures.
• A gate structure is wrapped around both the channel region and the dummy region of the nanostructures.

Potential applications of this technology:

• This device could be used in electronic devices such as transistors or integrated circuits.
• It may find applications in nanotechnology and semiconductor industries.

Problems solved by this technology:

• The device provides a way to control the flow of electric current in nanostructures.
• It allows for efficient and precise manipulation of electronic signals.

Benefits of this technology:

• The device offers improved performance and functionality in electronic devices.
• It enables miniaturization and integration of electronic components.
• It may lead to advancements in nanotechnology and semiconductor industries.

Original Abstract Submitted

In an embodiment, a device includes: first nanostructures; a first undoped semiconductor layer contacting a first dummy region of the first nanostructures; a first spacer on the first undoped semiconductor layer; a first source/drain region on the first spacer, the first source/drain region contacting a first channel region of the first nanostructures; and a first gate structure wrapped around the first channel region and the first dummy region of the first nanostructures.