18149477. Interconnect Structures simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

Interconnect Structures

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Sung-Li Wang of Zhubei City (TW)

Yasutoshi Okuno of Hsinchu (TW)

Interconnect Structures - A simplified explanation of the abstract

This abstract first appeared for US patent application 18149477 titled 'Interconnect Structures

Simplified Explanation

The patent application describes methods for forming an interconnect structure, specifically a dual damascene interconnect structure comprising a conductive line and a conductive via. The process involves forming an interconnect opening through one or more dielectric layers over a semiconductor substrate, and then forming a conductive via in the via opening. A nucleation enhancement treatment is performed on the exposed dielectric surfaces of the trench, followed by the formation of a conductive line in the trench and on the conductive via.

• The patent application describes a method for forming a dual damascene interconnect structure.
• The method involves forming an interconnect opening through dielectric layers over a semiconductor substrate.
• A conductive via is formed in the via opening.
• A nucleation enhancement treatment is performed on the exposed dielectric surfaces of the trench.
• A conductive line is formed in the trench and on the conductive via.

Potential Applications

• Semiconductor manufacturing
• Integrated circuit fabrication
• Electronics industry

Problems Solved

• Formation of interconnect structures with improved conductivity and reliability
• Enhanced nucleation on dielectric surfaces to improve adhesion and reduce resistance

Benefits

• Improved performance and reliability of interconnect structures
• Enhanced adhesion between conductive materials and dielectric surfaces
• Reduced resistance in interconnect structures

Original Abstract Submitted

Embodiments described herein relate generally to one or more methods for forming an interconnect structure, such as a dual damascene interconnect structure comprising a conductive line and a conductive via, and structures formed thereby. In some embodiments, an interconnect opening is formed through one or more dielectric layers over a semiconductor substrate. The interconnect opening has a via opening and a trench over the via opening. A conductive via is formed in the via opening. A nucleation enhancement treatment is performed on one or more exposed dielectric surfaces of the trench. A conductive line is formed in the trench on the one or more exposed dielectric surfaces of the trench and on the conductive via.