18143187. SEMICONDUCTOR DEVICE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR DEVICE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Jin Kim of Suwon-si (KR)

Namjae Kim of Suwon-si (KR)

Subin Kim of Suwon-si (KR)

Byungmoo Kim of Suwon-si (KR)

Joongwon Jeon of Suwon-si (KR)

SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18143187 titled 'SEMICONDUCTOR DEVICE

Simplified Explanation

The semiconductor device described in the abstract includes:

  • A substrate with a PMOS region, an N-well tap forming region, and a boundary region
  • PMOS field effect transistors on the PMOS region
  • An N-well tap region doped with N-type impurities in the N-well tap forming region
  • A first metal pattern connected to at least one impurity region of the PMOS field effect transistors, extending to the boundary region
  • A second metal pattern electrically connected to the N-well tap region, extending to the boundary region
  • First and second contact plugs on the first and second metal patterns
  • An upper wiring on the first and second contact plugs

Potential applications of this technology:

  • Integrated circuits
  • Semiconductor devices
  • Electronic devices

Problems solved by this technology:

  • Efficient electrical connections in semiconductor devices
  • Improved performance of PMOS field effect transistors
  • Enhanced reliability of the device

Benefits of this technology:

  • Enhanced electrical connectivity
  • Improved overall performance of semiconductor devices
  • Increased reliability and durability of the device


Original Abstract Submitted

A semiconductor device including: a substrate including a PMOS region, an N-well tap forming region, and a boundary region; PMOS field effect transistors on the PMOS region; an N-well tap region doped with N-type impurities in the N-well tap forming region; a first metal pattern connected to at least one impurity region of the PMOS field effect transistors, wherein the first metal pattern extends so that an end of the first metal pattern is positioned on the boundary region; a second metal pattern electrically connected to the N-well tap region, wherein the second metal pattern extends so that an end of the second metal pattern is positioned on the boundary region; a first contact plug on the first metal pattern; a second contact plug on the second metal pattern; and an upper wiring on the first and second contact plugs.