18138192. METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

From WikiPatents
Jump to navigation Jump to search

METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

PYUNG Moon of SUWON-SI (KR)

KIHYUN Kim of SUWON-SI (KR)

HYOUNGSUB Kim of SUWON-SI (KR)

HOIJOON Kim of SUWON-SI (KR)

GEUNYOUNG Yeom of SUWON-SI (KR)

KONGSOO Lee of SUWON-SI (KR)

HEESOO Lee of SUWON-SI (KR)

METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18138192 titled 'METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE

Simplified Explanation

The abstract describes a method of manufacturing an integrated circuit device. Here is a simplified explanation of the patent application:

  • The method involves stacking sacrificial semiconductor layers and channel layers alternately on a substrate to create a stack structure.
  • Source and drain regions are formed on both sides of the stack structure.
  • A gate space is created between the channel layers by removing the sacrificial semiconductor layers.
  • The channel layers are spaced apart from each other in a perpendicular direction to the substrate.
  • A plasma treatment of boron trichloride (BCL) is performed on the channel layers.
  • Gate dielectric layers are formed on the channel layers where the plasma treatment of BCL is performed.
  • Gate layers are formed to cover the gate dielectric layers in the gate space.

Potential applications of this technology:

  • Manufacturing of integrated circuit devices, such as microprocessors, memory chips, and other electronic components.
  • This method can be used in the production of various electronic devices, including smartphones, computers, and IoT devices.

Problems solved by this technology:

  • The method allows for the precise formation of gate spaces and gate dielectric layers, which are crucial for the proper functioning of integrated circuits.
  • It provides a reliable and efficient way to create channel layers and gate structures in the manufacturing process.

Benefits of this technology:

  • Improved performance and reliability of integrated circuit devices.
  • Enhanced control over the formation of gate spaces and gate dielectric layers.
  • Increased efficiency in the manufacturing process, leading to cost savings.


Original Abstract Submitted

A method of manufacturing an integrated circuit device includes alternately stacking sacrificial semiconductor layers and channel layers on a substrate to form a stack structure, forming source regions and drain regions on both sides of the stack structure, forming a gate space between the channel layers by removing the sacrificial semiconductor layers, forming the channel layers to be spaced apart from each other in a perpendicular direction to the substrate, performing a plasma treatment of boron trichloride (BCL) on the channel layers, forming gate dielectric layers on the channel layers on which the plasma treatment of boron trichloride (BCL) is performed, and forming gate layers covering the gate dielectric layers in the gate space.