18136499. SEMICONDUCTOR PACKAGES simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGES
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18136499 titled 'SEMICONDUCTOR PACKAGES
Simplified Explanation
The semiconductor package described in the patent application includes:
- A first redistribution substrate
- A second redistribution substrate on top of the first redistribution substrate
- A chip stack sandwiched between the two redistribution substrates
- A first molding layer covering the chip stack
- A through electrode extending into the first molding layer to connect the first and second redistribution substrates
The chip stack consists of:
- A first semiconductor chip on the first redistribution substrate with a through via
- A chip structure containing a second semiconductor chip and a second molding layer, stacked on top of the first semiconductor chip and connected to it via the through via
- A third semiconductor chip between the chip structure and the second redistribution substrate
Potential applications of this technology:
- Semiconductor packaging for electronic devices
- Integrated circuits in consumer electronics
- Microprocessors in computers
Problems solved by this technology:
- Efficient electrical connection between semiconductor chips
- Compact packaging for multiple chips in a small space
Benefits of this technology:
- Improved performance of electronic devices
- Higher integration density
- Enhanced reliability of semiconductor packages
Original Abstract Submitted
A semiconductor package may include a first redistribution substrate, a second redistribution substrate on the first redistribution substrate, a chip stack between the first redistribution substrate and the second redistribution substrate, a first molding layer on the chip stack, and a through electrode extending into the first molding layer and electrically connecting the first redistribution substrate to the second redistribution substrate. The chip stack may include a first semiconductor chip on the first redistribution substrate, the first semiconductor chip including a through via that extends therein, a chip structure including a second semiconductor chip and a second molding layer, the second semiconductor chip being on the first semiconductor chip and electrically connected to the through via, and a third semiconductor chip between the chip structure and the second redistribution substrate, and a side surface of the first semiconductor chip may be coplanar with a side surface of the chip structure.
