18135623. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18135623 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The patent application describes a semiconductor package that includes multiple stacked chips and a support structure. The package substrate has a substrate pad and a first chip stacked structure is mounted on its upper surface. The first chip stacked structure includes a base chip and one or more stacked chips. A second chip stacked structure is then offset-stacked on top of the first chip stacked structure, and it also includes a base chip and one or more stacked chips. A bonding wire and a first support are included in the package. The first support is mounted on the package substrate and supports the second chip stacked structure by supporting the lower surface of the second base chip.
- The semiconductor package includes multiple stacked chips and a support structure.
- The first chip stacked structure is mounted on the upper surface of the package substrate.
- The second chip stacked structure is offset-stacked on top of the first chip stacked structure.
- The first support is mounted on the package substrate and supports the second chip stacked structure.
- The first support supports the second chip stacked structure by supporting the lower surface of the second base chip.
Potential Applications
- This technology can be applied in various electronic devices that require compact and efficient semiconductor packaging.
- It can be used in smartphones, tablets, laptops, and other portable electronic devices.
- It can also be utilized in automotive electronics, medical devices, and industrial equipment.
Problems Solved
- The semiconductor package solves the problem of limited space in electronic devices by allowing for stacked chips.
- It provides a stable support structure for the stacked chips, preventing damage and improving reliability.
- The offset-stacking of chips allows for increased functionality and performance in a compact form factor.
Benefits
- The semiconductor package enables higher integration of chips, leading to improved performance and functionality.
- It allows for efficient use of space, making it suitable for small and portable electronic devices.
- The support structure ensures the stability and reliability of the stacked chips, reducing the risk of failure.
Original Abstract Submitted
Provided is a semiconductor package including a package substrate including a substrate pad, a first chip stacked structure including a first base chip mounted on an upper surface of the package substrate, and one or more first stacked chips sequentially offset-stacked along a first direction on the first base chip, a second chip stacked structure including a second base chip offset-stacked along the first direction on an upper surface of the first chip stacked structure, and one or more second stacked chips sequentially offset-stacked along the first direction on the second base chip, a bonding wire, and a first support mounted on the package substrate to be spaced apart from the first chip stacked structure in the first direction and supporting the second chip stacked structure, wherein the first support supports the second chip stacked structure by supporting a lower surface of the second base chip.
