18132171. SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18132171 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
Simplified Explanation
The semiconductor package described in the abstract includes a substrate with vias, a chip stack on the substrate, and a mold layer covering the substrate and part of the chip stack. The chip stack consists of multiple semiconductor chips stacked on top of each other, with non-conductive layers between them. The first chip in the stack is bonded to the substrate, while the uppermost chip is bonded to the one below it. Each of the second semiconductor chips is electrically connected to another chip in the stack or to the first chip.
- The semiconductor package includes a substrate with vias, a chip stack, and a mold layer.
- The chip stack comprises multiple semiconductor chips with non-conductive layers between them.
- The first chip in the stack is bonded to the substrate, while the uppermost chip is bonded to the one below it.
- Each second semiconductor chip is electrically connected to another chip in the stack or to the first chip.
Potential Applications
- Semiconductor industry for advanced packaging solutions.
- Consumer electronics for compact and efficient devices.
Problems Solved
- Improved electrical connectivity between stacked semiconductor chips.
- Enhanced thermal dissipation for better performance.
Benefits
- Higher integration density for more functionality in a smaller space.
- Improved reliability and performance of semiconductor devices.
Original Abstract Submitted
A semiconductor package including a substrate comprising a plurality of vias; a chip stack on the substrate; and a mold layer on the substrate and on at least a portion of the chip stack. The chip stack includes a first semiconductor chip; second semiconductor chips stacked on the first semiconductor chip; a third semiconductor chip on the uppermost one of the second semiconductor chips; and non-conductive layers between the first semiconductor chip and the second semiconductor chips. A first chip pad of the first semiconductor chip is bonded to a substrate pad of the substrate. A second chip pad of the uppermost one of the second semiconductor chips is bonded to a third chip pad of the third semiconductor chip. Each of the second semiconductor chips is electrically connected to another of the second semiconductor chips or the first semiconductor chip.
