18128363. DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME simplified abstract (Samsung Display Co., LTD.)

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DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME

Organization Name

Samsung Display Co., LTD.

Inventor(s)

SANGJIN Park of Yongin-si (KR)

MINSANG Kim of Yongin-si (KR)

SANGHYUK Lee of Yongin-si (KR)

MINGYU Jung of Yongin-si (KR)

DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18128363 titled 'DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME

Simplified Explanation

The patent application describes a display panel with a light emitting element and a pixel circuit including a first transistor connected to the light emitting element, as well as a first insulating layer.

  • The first transistor in the pixel circuit includes a first semiconductor pattern with a source region, a drain region, and a channel region, as well as a gate overlapping the channel region.
  • The first insulating layer has a first region overlapping a normal region of the first gate and the first source region, and a second region overlapping a protruding region of the first gate, with a greater thickness than the first region and positioned closer to the first drain region.

Potential applications of this technology:

  • Display panels for electronic devices such as smartphones, tablets, and televisions.
  • Lighting applications such as OLED displays and signage.

Problems solved by this technology:

  • Improved performance and efficiency of display panels.
  • Enhanced image quality and brightness control.

Benefits of this technology:

  • Higher resolution and sharper images on display panels.
  • Energy savings and longer lifespan for electronic devices using this technology.


Original Abstract Submitted

A display panel of the inventive concept includes a light emitting element, a pixel circuit including a first transistor and electrically connected to the light emitting element, and a first insulating layer. The first transistor includes a first semiconductor pattern arranged under the first insulating layer and including a first source region, a first drain region, and a first channel region arranged between the first source region and the first drain region, and a first gate arranged on the first insulating layer and overlapping the first channel region. The first insulating layer includes a first region overlapping a normal region of the first gate and the first source region, and a second region which overlaps a protruding region of the first gate, has a thickness greater than that of the first region, and is disposed close to the first drain region than the first region.