18126395. SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Seonhaeng Lee of Suwon-si (KR)

SANGWOO Pae of Suwon-si (KR)

NAMHYUN Lee of Suwon-si (KR)

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18126395 titled 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME

Simplified Explanation

The abstract describes a semiconductor memory structure with specific components and configurations.

• Substrate with buried dielectric layer and first recess
• Word line in the first recess
• First and second source/drain patterns on opposite sides of the word line
• Channel pattern between the word line and the first recess, contacting the source/drain patterns
• Bit line connected to the second source/drain pattern, extending in a direction intersecting the first direction
• Channel pattern with vertical and horizontal parts, with vertical parts on lateral surfaces of the word line and horizontal part below the word line

---

1. 1. 1. Potential Applications

• Memory devices
• Integrated circuits
• Data storage systems

1. 1. 1. Problems Solved

• Efficient memory storage
• Improved data retrieval speed
• Enhanced performance of semiconductor devices

1. 1. 1. Benefits

• Higher memory density
• Faster data access
• Increased overall efficiency of semiconductor memory systems

Original Abstract Submitted

A semiconductor memory may include a substrate, a buried dielectric layer on the substrate and providing a first recess that extends in a first direction, a word line in the first recess of the buried dielectric layer, first and second source/drain patterns on opposite sides of the word line, a channel pattern between the word line and the first recess of the buried dielectric layer and contacting the first and second source/drain patterns, and a bit line electrically connected to the second source/drain pattern and extending in a second direction that intersects the first direction. The channel pattern includes vertical parts and a horizontal part connected to each other. The vertical parts are on opposite lateral surfaces of the word line. The horizontal part is below the word line.