18125409. SEMICONDUCTOR PACKAGE AND DISPLAY APPARATUS INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGE AND DISPLAY APPARATUS INCLUDING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Narae Shin of Suwon-si (KR)

Seongho Shin of Suwon-si (KR)

Seonghwan Jeon of Suwon-si (KR)

SEMICONDUCTOR PACKAGE AND DISPLAY APPARATUS INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18125409 titled 'SEMICONDUCTOR PACKAGE AND DISPLAY APPARATUS INCLUDING THE SAME

Simplified Explanation

The patent application describes a semiconductor package that includes a base film, conductive structures, a via, a semiconductor chip, insulating layers, and conductive layers.

  • The semiconductor package includes a base film.
  • There are conductive structures on both surfaces of the base film.
  • A via passes through the base film, connecting the conductive structures.
  • A semiconductor chip is placed on one surface of the base film and connected to one of the conductive structures.
  • An insulating layer covers the conductive structure and has an opening exposing a conductive pattern.
  • A conductive layer is placed on the insulating layer, covering it and the semiconductor chip, and contacting the exposed conductive pattern.
  • Another conductive layer is placed on the other surface of the base film, covering the conductive structure and making contact with it.

Potential applications of this technology:

  • Semiconductor packaging for electronic devices.
  • Integrated circuits and microchips.

Problems solved by this technology:

  • Provides a structure for connecting conductive structures on both surfaces of a base film.
  • Allows for efficient electrical connections between the semiconductor chip and the conductive structures.

Benefits of this technology:

  • Improved electrical connectivity and performance.
  • Enhanced reliability and durability of the semiconductor package.
  • Simplified manufacturing process.


Original Abstract Submitted

A semiconductor package includes a base film, a first conductive structure disposed on a first surface of the base film, a second conductive structure disposed on a second surface of the base film, a via passing through the base film and connecting the first conductive structure to the second conductive structure, a semiconductor chip on the first surface and electrically connected to the first conductive structure, a first insulating layer covering the first conductive structure and including a first opening exposing a first conductive pattern of the first conductive structure, a first conductive layer disposed on the first insulating layer, covering the first insulating layer and the semiconductor chip, and contacting a region of the first conductive pattern exposed by the first opening, and a second conductive layer disposed on the second surface, covering the second conductive structure, and contacting at least a portion of the second conductive structure.