18122285. SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

HYUNSOO Chung of Suwon-si (KR)

YOUNG LYONG Kim of Suwon-si (KR)

Inhyo Hwang of Suwon-si (KR)

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18122285 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

Simplified Explanation

The abstract describes a semiconductor package that consists of a substrate, a chip structure mounted on the substrate, and a first dummy structure attached to the chip structure. The chip structure includes a first semiconductor chip, a second dummy structure located at the side of the first semiconductor chip, and a mold layer that encloses both the first semiconductor chip and the second dummy structure. The bottom surfaces of the first semiconductor chip, the second dummy structure, and the mold layer are all coplanar with each other.

  • The semiconductor package includes a substrate, chip structure, and a first dummy structure.
  • The chip structure comprises a first semiconductor chip, a second dummy structure, and a mold layer.
  • The first semiconductor chip and the second dummy structure are enclosed by the mold layer.
  • The bottom surfaces of the first semiconductor chip, the second dummy structure, and the mold layer are coplanar.

Potential Applications:

  • This semiconductor package can be used in various electronic devices such as smartphones, tablets, and computers.
  • It can be utilized in automotive electronics, medical devices, and industrial equipment.

Problems Solved:

  • The package design ensures that the bottom surfaces of the semiconductor chip, dummy structure, and mold layer are coplanar, providing a flat and stable base for the package.
  • The inclusion of the dummy structure helps in maintaining the coplanarity and structural integrity of the package.

Benefits:

  • The coplanar bottom surfaces of the package components improve the thermal and electrical performance of the semiconductor chip.
  • The stable base provided by the coplanar surfaces reduces the risk of damage during assembly and operation.
  • The dummy structure enhances the mechanical strength and stability of the package.
  • The design allows for efficient heat dissipation, leading to improved reliability and longevity of the semiconductor chip.


Original Abstract Submitted

A semiconductor package may include a substrate, a chip structure mounted on the substrate, and a first dummy structure attached to the chip structure. The chip structure may include a first semiconductor chip, a second dummy structure disposed at a side of the first semiconductor chip, and a mold layer enclosing the first semiconductor chip and the second dummy structure. A bottom surface of the first semiconductor chip, a bottom surface of the second dummy structure, and a bottom surface of the mold layer may be coplanar with each other.

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