18121869. SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
Organization Name
Inventor(s)
Hyohoon Byeon of Suwon-si (KR)
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18121869 titled 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
Simplified Explanation
The disclosed semiconductor device includes a substrate with an active pattern, a channel pattern consisting of vertically-stacked semiconductor patterns, a source/drain pattern connected to the semiconductor patterns, and a gate electrode on the semiconductor patterns. The gate electrode has a first portion between two adjacent semiconductor patterns, and a gate insulating layer is between the first portion of the gate electrode and the semiconductor patterns. The second semiconductor pattern is located at a higher tier than the first semiconductor pattern, and the first and second semiconductor patterns have different depths of channel recesses.
- The device includes a substrate with an active pattern, a channel pattern, a source/drain pattern, and a gate electrode.
- The channel pattern consists of vertically-stacked semiconductor patterns.
- The gate electrode has a first portion between two adjacent semiconductor patterns.
- A gate insulating layer is between the first portion of the gate electrode and the semiconductor patterns.
- The second semiconductor pattern is located at a higher tier than the first semiconductor pattern.
- The first and second semiconductor patterns have different depths of channel recesses.
Potential applications of this technology:
- This semiconductor device can be used in various electronic devices such as smartphones, tablets, and computers.
- It can be utilized in the manufacturing of integrated circuits and microprocessors.
- The device's unique structure allows for improved performance and efficiency in electronic devices.
Problems solved by this technology:
- The vertically-stacked semiconductor patterns provide a compact and efficient design, allowing for more functionality in a smaller space.
- The different depths of channel recesses in the semiconductor patterns enhance the device's performance and power efficiency.
- The gate insulating layer between the gate electrode and the semiconductor patterns ensures proper insulation and prevents leakage.
Benefits of this technology:
- The device's compact design allows for smaller and more portable electronic devices.
- The improved performance and power efficiency contribute to longer battery life and faster processing speeds.
- The manufacturing method of this device is cost-effective and scalable, making it suitable for mass production.
Original Abstract Submitted
A semiconductor device and a fabrication method thereof are disclosed. The device includes a substrate including an active pattern, a channel pattern on the active pattern, the channel pattern including a plurality of vertically-stacked semiconductor patterns, a source/drain pattern connected to the semiconductor patterns, a gate electrode on the semiconductor patterns, the gate electrode including a first portion interposed between first and second semiconductor patterns, which are two adjacent ones of the semiconductor patterns, and a gate insulating layer interposed between the first portion of the gate electrode and the first and second semiconductor patterns. The second semiconductor pattern is located at a tier higher than the first semiconductor pattern. The first semiconductor pattern includes a first channel recess having a first depth, and the second semiconductor pattern includes a second channel recess having a second depth smaller than the first depth.
